[llvm] r215913 - [X86][Haswell][SchedModel] Add architecture specific scheduling models.

[Quentin Colombet]

Author: qcolombet
Date: Mon Aug 18 12:55:32 2014
New Revision: 215913

URL: http://llvm.org/viewvc/llvm-project?rev=215913&view=rev
Log:
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Math instructions.

<rdar://problem/15607571>

Modified:
    llvm/trunk/lib/Target/X86/X86SchedHaswell.td

Modified: llvm/trunk/lib/Target/X86/X86SchedHaswell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedHaswell.td?rev=215913&r1=215912&r2=215913&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedHaswell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedHaswell.td Mon Aug 18 12:55:32 2014
@@ -1175,4 +1175,20 @@ def WriteFRNDINT : SchedWriteRes<[]> {
 }
 def : InstRW<[WriteFRNDINT], (instregex "FRNDINT")>;
 
+//-- Math instructions --//
+
+// FSCALE.
+def WriteFSCALE : SchedWriteRes<[]> {
+  let Latency = 75; // 49-125
+  let NumMicroOps = 50; // 25-75
+}
+def : InstRW<[WriteFSCALE], (instregex "FSCALE")>;
+
+// FXTRACT.
+def WriteFXTRACT : SchedWriteRes<[]> {
+  let Latency = 15;
+  let NumMicroOps = 17;
+}
+def : InstRW<[WriteFXTRACT], (instregex "FXTRACT")>;
+
 } // SchedModel