[PATCH] Teach the AArch64 backend about v4f16 and v8f16

[Tim Northover]

Hi Oliver,

It looks like there are various components to this patch, some without tests. And some of the tests that are here are a bit generic (it'd be nice to track that the correct operands get used, rather than just that an "fdiv" is emitted, for example).

  - There appear to be no tests for the ABI changes.
  - Hardly any coverage of load/store patterns or the C++ ISel
  - bitcast also seems to get short shrift, given how substantial the code changes are (mostly just used when it has to be as part of other shuffle testing).

We don't necessarily need blanket coverage (v4f16 is fundamentally very similar to v4i16) but something in between would be good.

Cheers.

Tim.

================
Comment at: lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp:385-388
@@ -384,2 +384,6 @@
     if (Op.getOperand(j).getValueType().isVector())
-      Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j));
+      if (Op.getOperand(j)
+              .getValueType()
+              .getVectorElementType()
+              .isFloatingPoint())
+        Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Op.getOperand(j));
----------------
This renders the comment just above wrong. Could you fix that?

http://reviews.llvm.org/D4955