[PATCH] Teach the AArch64 backend about half-precision floating point

[Tim Northover]

Hi Oliver,

This looks fine, apart from one nit. If you don't need FP_ROUND/FP_TRUNC feel free to remove those lines and just commit.

Cheers.

Tim.

================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:289-290
@@ +288,4 @@
+  setOperationAction(ISD::FSUB, MVT::f16, Promote);
+  setOperationAction(ISD::FP_ROUND, MVT::f16, Promote);
+  setOperationAction(ISD::FP_EXTEND, MVT::f16, Promote);
+
----------------
Are these needed? I don't see any code in LegalizeDAG to promote FP_ROUND or FP_EXTEND (and doing so sounds a bit dodgy, given that they're what we'll be using to *do* the promotion in general).

http://reviews.llvm.org/D4879