[llvm] r215828 - Reverted last commit
Chad Rosier
mcrosier at codeaurora.org
Sun Aug 17 08:22:23 PDT 2014
Elena,
> Author: delena
> Date: Sun Aug 17 04:39:48 2014
> New Revision: 215828
>
> URL: http://llvm.org/viewvc/llvm-project?rev=215828&view=rev
> Log:
> Reverted last commit
Please reference a svn revision number as well as clarify why the patch
was reverted.
Chad
> Modified:
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=215828&r1=215827&r2=215828&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Aug 17 04:39:48 2014
> @@ -49,7 +49,6 @@
> #include "llvm/Support/ErrorHandling.h"
> #include "llvm/Support/MathExtras.h"
> #include "llvm/Target/TargetOptions.h"
> -#include "X86IntrinsicsInfo.h"
> #include <bitset>
> #include <numeric>
> #include <cctype>
> @@ -14478,42 +14477,109 @@ static unsigned getOpcodeForFMAIntrinsic
>
> static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) {
> SDLoc dl(Op);
> - InitIntrinsicsWithoutChain();
> -
> unsigned IntNo =
> cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
> -
> - const IntrinsicData* IntrData = GetIntrinsicWithoutChain(IntNo);
> - if (IntrData) {
> - switch(IntrData->Type) {
> - case INTR_TYPE_1OP:
> - return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(),
> Op.getOperand(1));
> - case INTR_TYPE_2OP:
> - return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(),
> Op.getOperand(1),
> - Op.getOperand(2));
> - case INTR_TYPE_3OP:
> - return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(),
> Op.getOperand(1),
> - Op.getOperand(2), Op.getOperand(3));
> - case COMI: { // Comparison intrinsics
> - ISD::CondCode CC = (ISD::CondCode)IntrData->Opc1;
> - SDValue LHS = Op.getOperand(1);
> - SDValue RHS = Op.getOperand(2);
> - unsigned X86CC = TranslateX86CC(CC, true, LHS, RHS, DAG);
> - assert(X86CC != X86::COND_INVALID && "Unexpected illegal
> condition!");
> - SDValue Cond = DAG.getNode(IntrData->Opc0, dl, MVT::i32, LHS, RHS);
> - SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
> - DAG.getConstant(X86CC, MVT::i8), Cond);
> - return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
> - }
> - case VSHIFT:
> - return getTargetVShiftNode(IntrData->Opc0, dl,
> Op.getSimpleValueType(),
> - Op.getOperand(1), Op.getOperand(2),
> DAG);
> - default:
> + switch (IntNo) {
> + default: return SDValue(); // Don't custom lower most intrinsics.
> + // Comparison intrinsics.
> + case Intrinsic::x86_sse_comieq_ss:
> + case Intrinsic::x86_sse_comilt_ss:
> + case Intrinsic::x86_sse_comile_ss:
> + case Intrinsic::x86_sse_comigt_ss:
> + case Intrinsic::x86_sse_comige_ss:
> + case Intrinsic::x86_sse_comineq_ss:
> + case Intrinsic::x86_sse_ucomieq_ss:
> + case Intrinsic::x86_sse_ucomilt_ss:
> + case Intrinsic::x86_sse_ucomile_ss:
> + case Intrinsic::x86_sse_ucomigt_ss:
> + case Intrinsic::x86_sse_ucomige_ss:
> + case Intrinsic::x86_sse_ucomineq_ss:
> + case Intrinsic::x86_sse2_comieq_sd:
> + case Intrinsic::x86_sse2_comilt_sd:
> + case Intrinsic::x86_sse2_comile_sd:
> + case Intrinsic::x86_sse2_comigt_sd:
> + case Intrinsic::x86_sse2_comige_sd:
> + case Intrinsic::x86_sse2_comineq_sd:
> + case Intrinsic::x86_sse2_ucomieq_sd:
> + case Intrinsic::x86_sse2_ucomilt_sd:
> + case Intrinsic::x86_sse2_ucomile_sd:
> + case Intrinsic::x86_sse2_ucomigt_sd:
> + case Intrinsic::x86_sse2_ucomige_sd:
> + case Intrinsic::x86_sse2_ucomineq_sd: {
> + unsigned Opc;
> + ISD::CondCode CC;
> + switch (IntNo) {
> + default: llvm_unreachable("Impossible intrinsic"); // Can't reach
> here.
> + case Intrinsic::x86_sse_comieq_ss:
> + case Intrinsic::x86_sse2_comieq_sd:
> + Opc = X86ISD::COMI;
> + CC = ISD::SETEQ;
> + break;
> + case Intrinsic::x86_sse_comilt_ss:
> + case Intrinsic::x86_sse2_comilt_sd:
> + Opc = X86ISD::COMI;
> + CC = ISD::SETLT;
> + break;
> + case Intrinsic::x86_sse_comile_ss:
> + case Intrinsic::x86_sse2_comile_sd:
> + Opc = X86ISD::COMI;
> + CC = ISD::SETLE;
> + break;
> + case Intrinsic::x86_sse_comigt_ss:
> + case Intrinsic::x86_sse2_comigt_sd:
> + Opc = X86ISD::COMI;
> + CC = ISD::SETGT;
> + break;
> + case Intrinsic::x86_sse_comige_ss:
> + case Intrinsic::x86_sse2_comige_sd:
> + Opc = X86ISD::COMI;
> + CC = ISD::SETGE;
> + break;
> + case Intrinsic::x86_sse_comineq_ss:
> + case Intrinsic::x86_sse2_comineq_sd:
> + Opc = X86ISD::COMI;
> + CC = ISD::SETNE;
> + break;
> + case Intrinsic::x86_sse_ucomieq_ss:
> + case Intrinsic::x86_sse2_ucomieq_sd:
> + Opc = X86ISD::UCOMI;
> + CC = ISD::SETEQ;
> + break;
> + case Intrinsic::x86_sse_ucomilt_ss:
> + case Intrinsic::x86_sse2_ucomilt_sd:
> + Opc = X86ISD::UCOMI;
> + CC = ISD::SETLT;
> + break;
> + case Intrinsic::x86_sse_ucomile_ss:
> + case Intrinsic::x86_sse2_ucomile_sd:
> + Opc = X86ISD::UCOMI;
> + CC = ISD::SETLE;
> + break;
> + case Intrinsic::x86_sse_ucomigt_ss:
> + case Intrinsic::x86_sse2_ucomigt_sd:
> + Opc = X86ISD::UCOMI;
> + CC = ISD::SETGT;
> + break;
> + case Intrinsic::x86_sse_ucomige_ss:
> + case Intrinsic::x86_sse2_ucomige_sd:
> + Opc = X86ISD::UCOMI;
> + CC = ISD::SETGE;
> + break;
> + case Intrinsic::x86_sse_ucomineq_ss:
> + case Intrinsic::x86_sse2_ucomineq_sd:
> + Opc = X86ISD::UCOMI;
> + CC = ISD::SETNE;
> break;
> }
> - }
>
> - switch (IntNo) {
> - default: return SDValue(); // Don't custom lower most intrinsics.
> + SDValue LHS = Op.getOperand(1);
> + SDValue RHS = Op.getOperand(2);
> + unsigned X86CC = TranslateX86CC(CC, true, LHS, RHS, DAG);
> + assert(X86CC != X86::COND_INVALID && "Unexpected illegal
> condition!");
> + SDValue Cond = DAG.getNode(Opc, dl, MVT::i32, LHS, RHS);
> + SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
> + DAG.getConstant(X86CC, MVT::i8), Cond);
> + return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
> + }
>
> // Arithmetic intrinsics.
> case Intrinsic::x86_sse2_pmulu_dq:
> @@ -14536,6 +14602,128 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S
> return DAG.getNode(ISD::MULHS, dl, Op.getValueType(),
> Op.getOperand(1), Op.getOperand(2));
>
> + // SSE2/AVX2 sub with unsigned saturation intrinsics
> + case Intrinsic::x86_sse2_psubus_b:
> + case Intrinsic::x86_sse2_psubus_w:
> + case Intrinsic::x86_avx2_psubus_b:
> + case Intrinsic::x86_avx2_psubus_w:
> + return DAG.getNode(X86ISD::SUBUS, dl, Op.getValueType(),
> + Op.getOperand(1), Op.getOperand(2));
> +
> + // SSE3/AVX horizontal add/sub intrinsics
> + case Intrinsic::x86_sse3_hadd_ps:
> + case Intrinsic::x86_sse3_hadd_pd:
> + case Intrinsic::x86_avx_hadd_ps_256:
> + case Intrinsic::x86_avx_hadd_pd_256:
> + case Intrinsic::x86_sse3_hsub_ps:
> + case Intrinsic::x86_sse3_hsub_pd:
> + case Intrinsic::x86_avx_hsub_ps_256:
> + case Intrinsic::x86_avx_hsub_pd_256:
> + case Intrinsic::x86_ssse3_phadd_w_128:
> + case Intrinsic::x86_ssse3_phadd_d_128:
> + case Intrinsic::x86_avx2_phadd_w:
> + case Intrinsic::x86_avx2_phadd_d:
> + case Intrinsic::x86_ssse3_phsub_w_128:
> + case Intrinsic::x86_ssse3_phsub_d_128:
> + case Intrinsic::x86_avx2_phsub_w:
> + case Intrinsic::x86_avx2_phsub_d: {
> + unsigned Opcode;
> + switch (IntNo) {
> + default: llvm_unreachable("Impossible intrinsic"); // Can't reach
> here.
> + case Intrinsic::x86_sse3_hadd_ps:
> + case Intrinsic::x86_sse3_hadd_pd:
> + case Intrinsic::x86_avx_hadd_ps_256:
> + case Intrinsic::x86_avx_hadd_pd_256:
> + Opcode = X86ISD::FHADD;
> + break;
> + case Intrinsic::x86_sse3_hsub_ps:
> + case Intrinsic::x86_sse3_hsub_pd:
> + case Intrinsic::x86_avx_hsub_ps_256:
> + case Intrinsic::x86_avx_hsub_pd_256:
> + Opcode = X86ISD::FHSUB;
> + break;
> + case Intrinsic::x86_ssse3_phadd_w_128:
> + case Intrinsic::x86_ssse3_phadd_d_128:
> + case Intrinsic::x86_avx2_phadd_w:
> + case Intrinsic::x86_avx2_phadd_d:
> + Opcode = X86ISD::HADD;
> + break;
> + case Intrinsic::x86_ssse3_phsub_w_128:
> + case Intrinsic::x86_ssse3_phsub_d_128:
> + case Intrinsic::x86_avx2_phsub_w:
> + case Intrinsic::x86_avx2_phsub_d:
> + Opcode = X86ISD::HSUB;
> + break;
> + }
> + return DAG.getNode(Opcode, dl, Op.getValueType(),
> + Op.getOperand(1), Op.getOperand(2));
> + }
> +
> + // SSE2/SSE41/AVX2 integer max/min intrinsics.
> + case Intrinsic::x86_sse2_pmaxu_b:
> + case Intrinsic::x86_sse41_pmaxuw:
> + case Intrinsic::x86_sse41_pmaxud:
> + case Intrinsic::x86_avx2_pmaxu_b:
> + case Intrinsic::x86_avx2_pmaxu_w:
> + case Intrinsic::x86_avx2_pmaxu_d:
> + case Intrinsic::x86_sse2_pminu_b:
> + case Intrinsic::x86_sse41_pminuw:
> + case Intrinsic::x86_sse41_pminud:
> + case Intrinsic::x86_avx2_pminu_b:
> + case Intrinsic::x86_avx2_pminu_w:
> + case Intrinsic::x86_avx2_pminu_d:
> + case Intrinsic::x86_sse41_pmaxsb:
> + case Intrinsic::x86_sse2_pmaxs_w:
> + case Intrinsic::x86_sse41_pmaxsd:
> + case Intrinsic::x86_avx2_pmaxs_b:
> + case Intrinsic::x86_avx2_pmaxs_w:
> + case Intrinsic::x86_avx2_pmaxs_d:
> + case Intrinsic::x86_sse41_pminsb:
> + case Intrinsic::x86_sse2_pmins_w:
> + case Intrinsic::x86_sse41_pminsd:
> + case Intrinsic::x86_avx2_pmins_b:
> + case Intrinsic::x86_avx2_pmins_w:
> + case Intrinsic::x86_avx2_pmins_d: {
> + unsigned Opcode;
> + switch (IntNo) {
> + default: llvm_unreachable("Impossible intrinsic"); // Can't reach
> here.
> + case Intrinsic::x86_sse2_pmaxu_b:
> + case Intrinsic::x86_sse41_pmaxuw:
> + case Intrinsic::x86_sse41_pmaxud:
> + case Intrinsic::x86_avx2_pmaxu_b:
> + case Intrinsic::x86_avx2_pmaxu_w:
> + case Intrinsic::x86_avx2_pmaxu_d:
> + Opcode = X86ISD::UMAX;
> + break;
> + case Intrinsic::x86_sse2_pminu_b:
> + case Intrinsic::x86_sse41_pminuw:
> + case Intrinsic::x86_sse41_pminud:
> + case Intrinsic::x86_avx2_pminu_b:
> + case Intrinsic::x86_avx2_pminu_w:
> + case Intrinsic::x86_avx2_pminu_d:
> + Opcode = X86ISD::UMIN;
> + break;
> + case Intrinsic::x86_sse41_pmaxsb:
> + case Intrinsic::x86_sse2_pmaxs_w:
> + case Intrinsic::x86_sse41_pmaxsd:
> + case Intrinsic::x86_avx2_pmaxs_b:
> + case Intrinsic::x86_avx2_pmaxs_w:
> + case Intrinsic::x86_avx2_pmaxs_d:
> + Opcode = X86ISD::SMAX;
> + break;
> + case Intrinsic::x86_sse41_pminsb:
> + case Intrinsic::x86_sse2_pmins_w:
> + case Intrinsic::x86_sse41_pminsd:
> + case Intrinsic::x86_avx2_pmins_b:
> + case Intrinsic::x86_avx2_pmins_w:
> + case Intrinsic::x86_avx2_pmins_d:
> + Opcode = X86ISD::SMIN;
> + break;
> + }
> + return DAG.getNode(Opcode, dl, Op.getValueType(),
> + Op.getOperand(1), Op.getOperand(2));
> + }
> +
> // SSE/SSE2/AVX floating point max/min intrinsics.
> case Intrinsic::x86_sse_max_ps:
> case Intrinsic::x86_sse2_max_pd:
> @@ -14640,6 +14828,17 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S
> return DAG.getNode(X86ISD::PSIGN, dl, Op.getValueType(),
> Op.getOperand(1), Op.getOperand(2));
>
> + case Intrinsic::x86_sse41_insertps:
> + return DAG.getNode(X86ISD::INSERTPS, dl, Op.getValueType(),
> + Op.getOperand(1), Op.getOperand(2),
> Op.getOperand(3));
> +
> + case Intrinsic::x86_avx_vperm2f128_ps_256:
> + case Intrinsic::x86_avx_vperm2f128_pd_256:
> + case Intrinsic::x86_avx_vperm2f128_si_256:
> + case Intrinsic::x86_avx2_vperm2i128:
> + return DAG.getNode(X86ISD::VPERM2X128, dl, Op.getValueType(),
> + Op.getOperand(1), Op.getOperand(2),
> Op.getOperand(3));
> +
> case Intrinsic::x86_avx2_permd:
> case Intrinsic::x86_avx2_permps:
> // Operands intentionally swapped. Mask is last operand to intrinsic,
> @@ -14647,6 +14846,12 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S
> return DAG.getNode(X86ISD::VPERMV, dl, Op.getValueType(),
> Op.getOperand(2), Op.getOperand(1));
>
> + case Intrinsic::x86_sse_sqrt_ps:
> + case Intrinsic::x86_sse2_sqrt_pd:
> + case Intrinsic::x86_avx_sqrt_ps_256:
> + case Intrinsic::x86_avx_sqrt_pd_256:
> + return DAG.getNode(ISD::FSQRT, dl, Op.getValueType(),
> Op.getOperand(1));
> +
> case Intrinsic::x86_avx512_mask_valign_q_512:
> case Intrinsic::x86_avx512_mask_valign_d_512:
> // Vector source operands are swapped.
> @@ -14732,6 +14937,100 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S
> return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
> }
>
> + // SSE/AVX shift intrinsics
> + case Intrinsic::x86_sse2_psll_w:
> + case Intrinsic::x86_sse2_psll_d:
> + case Intrinsic::x86_sse2_psll_q:
> + case Intrinsic::x86_avx2_psll_w:
> + case Intrinsic::x86_avx2_psll_d:
> + case Intrinsic::x86_avx2_psll_q:
> + case Intrinsic::x86_sse2_psrl_w:
> + case Intrinsic::x86_sse2_psrl_d:
> + case Intrinsic::x86_sse2_psrl_q:
> + case Intrinsic::x86_avx2_psrl_w:
> + case Intrinsic::x86_avx2_psrl_d:
> + case Intrinsic::x86_avx2_psrl_q:
> + case Intrinsic::x86_sse2_psra_w:
> + case Intrinsic::x86_sse2_psra_d:
> + case Intrinsic::x86_avx2_psra_w:
> + case Intrinsic::x86_avx2_psra_d: {
> + unsigned Opcode;
> + switch (IntNo) {
> + default: llvm_unreachable("Impossible intrinsic"); // Can't reach
> here.
> + case Intrinsic::x86_sse2_psll_w:
> + case Intrinsic::x86_sse2_psll_d:
> + case Intrinsic::x86_sse2_psll_q:
> + case Intrinsic::x86_avx2_psll_w:
> + case Intrinsic::x86_avx2_psll_d:
> + case Intrinsic::x86_avx2_psll_q:
> + Opcode = X86ISD::VSHL;
> + break;
> + case Intrinsic::x86_sse2_psrl_w:
> + case Intrinsic::x86_sse2_psrl_d:
> + case Intrinsic::x86_sse2_psrl_q:
> + case Intrinsic::x86_avx2_psrl_w:
> + case Intrinsic::x86_avx2_psrl_d:
> + case Intrinsic::x86_avx2_psrl_q:
> + Opcode = X86ISD::VSRL;
> + break;
> + case Intrinsic::x86_sse2_psra_w:
> + case Intrinsic::x86_sse2_psra_d:
> + case Intrinsic::x86_avx2_psra_w:
> + case Intrinsic::x86_avx2_psra_d:
> + Opcode = X86ISD::VSRA;
> + break;
> + }
> + return DAG.getNode(Opcode, dl, Op.getValueType(),
> + Op.getOperand(1), Op.getOperand(2));
> + }
> +
> + // SSE/AVX immediate shift intrinsics
> + case Intrinsic::x86_sse2_pslli_w:
> + case Intrinsic::x86_sse2_pslli_d:
> + case Intrinsic::x86_sse2_pslli_q:
> + case Intrinsic::x86_avx2_pslli_w:
> + case Intrinsic::x86_avx2_pslli_d:
> + case Intrinsic::x86_avx2_pslli_q:
> + case Intrinsic::x86_sse2_psrli_w:
> + case Intrinsic::x86_sse2_psrli_d:
> + case Intrinsic::x86_sse2_psrli_q:
> + case Intrinsic::x86_avx2_psrli_w:
> + case Intrinsic::x86_avx2_psrli_d:
> + case Intrinsic::x86_avx2_psrli_q:
> + case Intrinsic::x86_sse2_psrai_w:
> + case Intrinsic::x86_sse2_psrai_d:
> + case Intrinsic::x86_avx2_psrai_w:
> + case Intrinsic::x86_avx2_psrai_d: {
> + unsigned Opcode;
> + switch (IntNo) {
> + default: llvm_unreachable("Impossible intrinsic"); // Can't reach
> here.
> + case Intrinsic::x86_sse2_pslli_w:
> + case Intrinsic::x86_sse2_pslli_d:
> + case Intrinsic::x86_sse2_pslli_q:
> + case Intrinsic::x86_avx2_pslli_w:
> + case Intrinsic::x86_avx2_pslli_d:
> + case Intrinsic::x86_avx2_pslli_q:
> + Opcode = X86ISD::VSHLI;
> + break;
> + case Intrinsic::x86_sse2_psrli_w:
> + case Intrinsic::x86_sse2_psrli_d:
> + case Intrinsic::x86_sse2_psrli_q:
> + case Intrinsic::x86_avx2_psrli_w:
> + case Intrinsic::x86_avx2_psrli_d:
> + case Intrinsic::x86_avx2_psrli_q:
> + Opcode = X86ISD::VSRLI;
> + break;
> + case Intrinsic::x86_sse2_psrai_w:
> + case Intrinsic::x86_sse2_psrai_d:
> + case Intrinsic::x86_avx2_psrai_w:
> + case Intrinsic::x86_avx2_psrai_d:
> + Opcode = X86ISD::VSRAI;
> + break;
> + }
> + return getTargetVShiftNode(Opcode, dl, Op.getSimpleValueType(),
> + Op.getOperand(1), Op.getOperand(2), DAG);
> + }
> +
> case Intrinsic::x86_sse42_pcmpistria128:
> case Intrinsic::x86_sse42_pcmpestria128:
> case Intrinsic::x86_sse42_pcmpistric128:
> @@ -15043,26 +15342,122 @@ static SDValue LowerREADCYCLECOUNTER(SDV
> return DAG.getMergeValues(Results, DL);
> }
>
> +enum IntrinsicType {
> + GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST
> +};
> +
> +struct IntrinsicData {
> + IntrinsicData(IntrinsicType IType, unsigned IOpc0, unsigned IOpc1)
> + :Type(IType), Opc0(IOpc0), Opc1(IOpc1) {}
> + IntrinsicType Type;
> + unsigned Opc0;
> + unsigned Opc1;
> +};
> +
> +std::map < unsigned, IntrinsicData> IntrMap;
> +static void InitIntinsicsMap() {
> + static bool Initialized = false;
> + if (Initialized)
> + return;
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qps_512,
> + IntrinsicData(GATHER, X86::VGATHERQPSZrm,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qps_512,
> + IntrinsicData(GATHER, X86::VGATHERQPSZrm,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qpd_512,
> + IntrinsicData(GATHER, X86::VGATHERQPDZrm,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dpd_512,
> + IntrinsicData(GATHER, X86::VGATHERDPDZrm,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dps_512,
> + IntrinsicData(GATHER, X86::VGATHERDPSZrm,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qpi_512,
> + IntrinsicData(GATHER, X86::VPGATHERQDZrm,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qpq_512,
> + IntrinsicData(GATHER, X86::VPGATHERQQZrm,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dpi_512,
> + IntrinsicData(GATHER, X86::VPGATHERDDZrm,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dpq_512,
> + IntrinsicData(GATHER, X86::VPGATHERDQZrm,
> 0)));
> +
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qps_512,
> + IntrinsicData(SCATTER,
> X86::VSCATTERQPSZmr, 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qpd_512,
> + IntrinsicData(SCATTER,
> X86::VSCATTERQPDZmr, 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dpd_512,
> + IntrinsicData(SCATTER,
> X86::VSCATTERDPDZmr, 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dps_512,
> + IntrinsicData(SCATTER,
> X86::VSCATTERDPSZmr, 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qpi_512,
> + IntrinsicData(SCATTER,
> X86::VPSCATTERQDZmr, 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qpq_512,
> + IntrinsicData(SCATTER,
> X86::VPSCATTERQQZmr, 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dpi_512,
> + IntrinsicData(SCATTER,
> X86::VPSCATTERDDZmr, 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dpq_512,
> + IntrinsicData(SCATTER,
> X86::VPSCATTERDQZmr, 0)));
> +
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_qps_512,
> + IntrinsicData(PREFETCH,
> X86::VGATHERPF0QPSm,
> +
> X86::VGATHERPF1QPSm)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_qpd_512,
> + IntrinsicData(PREFETCH,
> X86::VGATHERPF0QPDm,
> +
> X86::VGATHERPF1QPDm)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_dpd_512,
> + IntrinsicData(PREFETCH,
> X86::VGATHERPF0DPDm,
> +
> X86::VGATHERPF1DPDm)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_dps_512,
> + IntrinsicData(PREFETCH,
> X86::VGATHERPF0DPSm,
> +
> X86::VGATHERPF1DPSm)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_qps_512,
> + IntrinsicData(PREFETCH,
> X86::VSCATTERPF0QPSm,
> +
> X86::VSCATTERPF1QPSm)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_qpd_512,
> + IntrinsicData(PREFETCH,
> X86::VSCATTERPF0QPDm,
> +
> X86::VSCATTERPF1QPDm)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_dpd_512,
> + IntrinsicData(PREFETCH,
> X86::VSCATTERPF0DPDm,
> +
> X86::VSCATTERPF1DPDm)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_dps_512,
> + IntrinsicData(PREFETCH,
> X86::VSCATTERPF0DPSm,
> +
> X86::VSCATTERPF1DPSm)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_16,
> + IntrinsicData(RDRAND, X86ISD::RDRAND,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_32,
> + IntrinsicData(RDRAND, X86ISD::RDRAND,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_64,
> + IntrinsicData(RDRAND, X86ISD::RDRAND,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_16,
> + IntrinsicData(RDSEED, X86ISD::RDSEED,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_32,
> + IntrinsicData(RDSEED, X86ISD::RDSEED,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_64,
> + IntrinsicData(RDSEED, X86ISD::RDSEED,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_xtest,
> + IntrinsicData(XTEST, X86ISD::XTEST,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_rdtsc,
> + IntrinsicData(RDTSC, X86ISD::RDTSC_DAG,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_rdtscp,
> + IntrinsicData(RDTSC, X86ISD::RDTSCP_DAG,
> 0)));
> + IntrMap.insert(std::make_pair(Intrinsic::x86_rdpmc,
> + IntrinsicData(RDPMC, X86ISD::RDPMC_DAG,
> 0)));
> + Initialized = true;
> +}
>
> static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget
> *Subtarget,
> SelectionDAG &DAG) {
> - InitIntrinsicsWithChain();
> + InitIntinsicsMap();
> unsigned IntNo =
> cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
> -
> - const IntrinsicData* IntrData = GetIntrinsicWithChain(IntNo);
> - if (!IntrData)
> + std::map < unsigned, IntrinsicData>::const_iterator itr =
> IntrMap.find(IntNo);
> + if (itr == IntrMap.end())
> return SDValue();
>
> SDLoc dl(Op);
> - switch(IntrData->Type) {
> - default:
> - llvm_unreachable("Unknown Intrinsic Type");
> - break;
> + IntrinsicData Intr = itr->second;
> + switch(Intr.Type) {
> case RDSEED:
> case RDRAND: {
> // Emit the node with the right value type.
> SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Glue,
> MVT::Other);
> - SDValue Result = DAG.getNode(IntrData->Opc0, dl, VTs,
> Op.getOperand(0));
> + SDValue Result = DAG.getNode(Intr.Opc0, dl, VTs, Op.getOperand(0));
>
> // If the value returned by RDRAND/RDSEED was valid (CF=1), return 1.
> // Otherwise return the value from Rand, which is always 0, casted to
> i32.
> @@ -15086,7 +15481,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD
> SDValue Index = Op.getOperand(4);
> SDValue Mask = Op.getOperand(5);
> SDValue Scale = Op.getOperand(6);
> - return getGatherNode(IntrData->Opc0, Op, DAG, Src, Mask, Base, Index,
> Scale, Chain,
> + return getGatherNode(Intr.Opc0, Op, DAG, Src, Mask, Base, Index,
> Scale, Chain,
> Subtarget);
> }
> case SCATTER: {
> @@ -15097,7 +15492,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD
> SDValue Index = Op.getOperand(4);
> SDValue Src = Op.getOperand(5);
> SDValue Scale = Op.getOperand(6);
> - return getScatterNode(IntrData->Opc0, Op, DAG, Src, Mask, Base,
> Index, Scale, Chain);
> + return getScatterNode(Intr.Opc0, Op, DAG, Src, Mask, Base, Index,
> Scale, Chain);
> }
> case PREFETCH: {
> SDValue Hint = Op.getOperand(6);
> @@ -15105,7 +15500,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD
> if (dyn_cast<ConstantSDNode> (Hint) == nullptr ||
> (HintVal = dyn_cast<ConstantSDNode> (Hint)->getZExtValue()) > 1)
> llvm_unreachable("Wrong prefetch hint in intrinsic: should be 0 or
> 1");
> - unsigned Opcode = (HintVal ? IntrData->Opc1 : IntrData->Opc0);
> + unsigned Opcode = (HintVal ? Intr.Opc1 : Intr.Opc0);
> SDValue Chain = Op.getOperand(0);
> SDValue Mask = Op.getOperand(2);
> SDValue Index = Op.getOperand(3);
> @@ -15116,7 +15511,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD
> // Read Time Stamp Counter (RDTSC) and Processor ID (RDTSCP).
> case RDTSC: {
> SmallVector<SDValue, 2> Results;
> - getReadTimeStampCounter(Op.getNode(), dl, IntrData->Opc0, DAG,
> Subtarget, Results);
> + getReadTimeStampCounter(Op.getNode(), dl, Intr.Opc0, DAG, Subtarget,
> Results);
> return DAG.getMergeValues(Results, dl);
> }
> // Read Performance Monitoring Counters.
> @@ -15137,7 +15532,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD
> Ret, SDValue(InTrans.getNode(), 1));
> }
> }
> -
> + llvm_unreachable("Unknown Intrinsic Type");
> }
>
> SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op,
>
>
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