[Thumb1] Fix and re-enable the load/store optimization pass

Renato Golin renato.golin at linaro.org
Wed Aug 13 08:29:32 PDT 2014


Hi Moritz,

On 12 August 2014 15:07, Moritz Roth <moritz.roth at arm.com> wrote:
> 0001: Correctly transfer kill flags on the base register.

This patch looks correct.


> 0002: Make the merging more conservative on Thumb1.

I just don't get this one. This should be disabled in Thumb1, right?
Why bother changing the behaviour and not re-enabling it on the same
patch?

Did you change getMaxInlineSizeThreshold() because you're not doing
the LDM on two registers on T1 any more? You plan on doing the full
fold in the future even on T1?

Either way, a comment / fixme to that effect would be good.


> 0003: Re-enable the pass, and add test cases for the previous two patches.
> There are three new regression tests created from simple test programs that
> were miscompiled previously, and I’ve added –verify-machineinstrs to each of
> the tests as well.

If I got it right, you shouldn't have SUBS after some LDMs, so would
be good to CHECK-NOT them on the appropriate tests.

I think it'd make more sense to have patches 02 and 03 merged into one.

Thanks!
--renato




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