[llvm] r215328 - ARM: correct isPredicable for MULS in ThHUMB mode

[Tim Northover]

Hi Saleem,

> +  if (MI->getOpcode() == ARM::tMUL || MI->getOpcode() == ARM::t2MUL)
> +    if (isCPSRDefined(MI))
> +      return false;

This problem seems much more widespread than just MUL. Virtually every
Thumb1 reg/reg instruction I look at has the same constraints.

On the other hand, one instruction I think it *doesn't* apply to is
t2MUL. If that's setting CPSR something has already gone horribly
wrong.

Cheers.

Tim.