[llvm] r215293 - Resolving some type truncation warnings in MSVC (enum to bool in this case). No functional changes intended.

Aaron Ballman aaron at aaronballman.com
Sat Aug 9 12:53:34 PDT 2014


Author: aaronballman
Date: Sat Aug  9 14:53:34 2014
New Revision: 215293

URL: http://llvm.org/viewvc/llvm-project?rev=215293&view=rev
Log:
Resolving some type truncation warnings in MSVC (enum to bool in this case). No functional changes intended.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=215293&r1=215292&r2=215293&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp Sat Aug  9 14:53:34 2014
@@ -2554,7 +2554,7 @@ void AArch64InstrInfo::genAlternativeCod
       if (AArch64_AM::processLogicalImmediate(UImm, BitSize, Encoding)) {
         MachineInstrBuilder MIB1 =
             BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc))
-                .addOperand(MachineOperand::CreateReg(NewVR, RegState::Define))
+                .addOperand(MachineOperand::CreateReg(NewVR, true))
                 .addReg(ZeroReg)
                 .addImm(Encoding);
         InsInstrs.push_back(MIB1);
@@ -2586,7 +2586,7 @@ void AArch64InstrInfo::genAlternativeCod
     // SUB NewVR, 0, C
     MachineInstrBuilder MIB1 =
         BuildMI(MF, Root.getDebugLoc(), TII->get(SubOpc))
-            .addOperand(MachineOperand::CreateReg(NewVR, RegState::Define))
+            .addOperand(MachineOperand::CreateReg(NewVR, true))
             .addReg(ZeroReg)
             .addOperand(Root.getOperand(2));
     InsInstrs.push_back(MIB1);
@@ -2635,7 +2635,7 @@ void AArch64InstrInfo::genAlternativeCod
     if (AArch64_AM::processLogicalImmediate(UImm, BitSize, Encoding)) {
       MachineInstrBuilder MIB1 =
           BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc))
-              .addOperand(MachineOperand::CreateReg(NewVR, RegState::Define))
+              .addOperand(MachineOperand::CreateReg(NewVR, true))
               .addReg(ZeroReg)
               .addImm(Encoding);
       InsInstrs.push_back(MIB1);





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