[llvm] r214851 - Allow binary and for tblgen math.

Adam Nemet anemet at apple.com
Tue Aug 5 14:35:03 PDT 2014


Hi Joerg,

Please don’t forget to update the documentation (both intro and ref).

Thanks,
Adam

On Aug 5, 2014, at 2:43 AM, Joerg Sonnenberger <joerg at bec.de> wrote:

> Author: joerg
> Date: Tue Aug  5 04:43:25 2014
> New Revision: 214851
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=214851&view=rev
> Log:
> Allow binary and for tblgen math.
> 
> Modified:
>    llvm/trunk/include/llvm/TableGen/Record.h
>    llvm/trunk/lib/TableGen/Record.cpp
>    llvm/trunk/lib/TableGen/TGLexer.cpp
>    llvm/trunk/lib/TableGen/TGLexer.h
>    llvm/trunk/lib/TableGen/TGParser.cpp
>    llvm/trunk/test/TableGen/math.td
> 
> Modified: llvm/trunk/include/llvm/TableGen/Record.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/TableGen/Record.h?rev=214851&r1=214850&r2=214851&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/TableGen/Record.h (original)
> +++ llvm/trunk/include/llvm/TableGen/Record.h Tue Aug  5 04:43:25 2014
> @@ -928,7 +928,7 @@ public:
> ///
> class BinOpInit : public OpInit {
> public:
> -  enum BinaryOp { ADD, SHL, SRA, SRL, LISTCONCAT, STRCONCAT, CONCAT, EQ };
> +  enum BinaryOp { ADD, AND, SHL, SRA, SRL, LISTCONCAT, STRCONCAT, CONCAT, EQ };
> 
> private:
>   BinaryOp Opc;
> 
> Modified: llvm/trunk/lib/TableGen/Record.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/TableGen/Record.cpp?rev=214851&r1=214850&r2=214851&view=diff
> ==============================================================================
> --- llvm/trunk/lib/TableGen/Record.cpp (original)
> +++ llvm/trunk/lib/TableGen/Record.cpp Tue Aug  5 04:43:25 2014
> @@ -952,6 +952,7 @@ Init *BinOpInit::Fold(Record *CurRec, Mu
>     break;
>   }
>   case ADD:
> +  case AND:
>   case SHL:
>   case SRA:
>   case SRL: {
> @@ -965,6 +966,7 @@ Init *BinOpInit::Fold(Record *CurRec, Mu
>       switch (getOpcode()) {
>       default: llvm_unreachable("Bad opcode!");
>       case ADD: Result = LHSv +  RHSv; break;
> +      case AND: Result = LHSv &  RHSv; break;
>       case SHL: Result = LHSv << RHSv; break;
>       case SRA: Result = LHSv >> RHSv; break;
>       case SRL: Result = (uint64_t)LHSv >> (uint64_t)RHSv; break;
> @@ -991,6 +993,7 @@ std::string BinOpInit::getAsString() con
>   switch (Opc) {
>   case CONCAT: Result = "!con"; break;
>   case ADD: Result = "!add"; break;
> +  case AND: Result = "!and"; break;
>   case SHL: Result = "!shl"; break;
>   case SRA: Result = "!sra"; break;
>   case SRL: Result = "!srl"; break;
> 
> Modified: llvm/trunk/lib/TableGen/TGLexer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/TableGen/TGLexer.cpp?rev=214851&r1=214850&r2=214851&view=diff
> ==============================================================================
> --- llvm/trunk/lib/TableGen/TGLexer.cpp (original)
> +++ llvm/trunk/lib/TableGen/TGLexer.cpp Tue Aug  5 04:43:25 2014
> @@ -471,6 +471,7 @@ tgtok::TokKind TGLexer::LexExclaim() {
>     .Case("tail", tgtok::XTail)
>     .Case("con", tgtok::XConcat)
>     .Case("add", tgtok::XADD)
> +    .Case("and", tgtok::XAND)
>     .Case("shl", tgtok::XSHL)
>     .Case("sra", tgtok::XSRA)
>     .Case("srl", tgtok::XSRL)
> 
> Modified: llvm/trunk/lib/TableGen/TGLexer.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/TableGen/TGLexer.h?rev=214851&r1=214850&r2=214851&view=diff
> ==============================================================================
> --- llvm/trunk/lib/TableGen/TGLexer.h (original)
> +++ llvm/trunk/lib/TableGen/TGLexer.h Tue Aug  5 04:43:25 2014
> @@ -47,8 +47,8 @@ namespace tgtok {
>     MultiClass, String,
> 
>     // !keywords.
> -    XConcat, XADD, XSRA, XSRL, XSHL, XListConcat, XStrConcat, XCast, XSubst,
> -    XForEach, XHead, XTail, XEmpty, XIf, XEq,
> +    XConcat, XADD, XAND, XSRA, XSRL, XSHL, XListConcat, XStrConcat, XCast,
> +    XSubst, XForEach, XHead, XTail, XEmpty, XIf, XEq,
> 
>     // Integer value.
>     IntVal,
> 
> Modified: llvm/trunk/lib/TableGen/TGParser.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/TableGen/TGParser.cpp?rev=214851&r1=214850&r2=214851&view=diff
> ==============================================================================
> --- llvm/trunk/lib/TableGen/TGParser.cpp (original)
> +++ llvm/trunk/lib/TableGen/TGParser.cpp Tue Aug  5 04:43:25 2014
> @@ -911,6 +911,7 @@ Init *TGParser::ParseOperation(Record *C
> 
>   case tgtok::XConcat:
>   case tgtok::XADD:
> +  case tgtok::XAND:
>   case tgtok::XSRA:
>   case tgtok::XSRL:
>   case tgtok::XSHL:
> @@ -928,6 +929,7 @@ Init *TGParser::ParseOperation(Record *C
>     default: llvm_unreachable("Unhandled code!");
>     case tgtok::XConcat: Code = BinOpInit::CONCAT;Type = DagRecTy::get(); break;
>     case tgtok::XADD:    Code = BinOpInit::ADD;   Type = IntRecTy::get(); break;
> +    case tgtok::XAND:    Code = BinOpInit::AND;   Type = IntRecTy::get(); break;
>     case tgtok::XSRA:    Code = BinOpInit::SRA;   Type = IntRecTy::get(); break;
>     case tgtok::XSRL:    Code = BinOpInit::SRL;   Type = IntRecTy::get(); break;
>     case tgtok::XSHL:    Code = BinOpInit::SHL;   Type = IntRecTy::get(); break;
> @@ -1446,6 +1448,7 @@ Init *TGParser::ParseSimpleValue(Record
>   case tgtok::XCast:  // Value ::= !unop '(' Value ')'
>   case tgtok::XConcat:
>   case tgtok::XADD:
> +  case tgtok::XAND:
>   case tgtok::XSRA:
>   case tgtok::XSRL:
>   case tgtok::XSHL:
> 
> Modified: llvm/trunk/test/TableGen/math.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/math.td?rev=214851&r1=214850&r2=214851&view=diff
> ==============================================================================
> --- llvm/trunk/test/TableGen/math.td (original)
> +++ llvm/trunk/test/TableGen/math.td Tue Aug  5 04:43:25 2014
> @@ -15,6 +15,12 @@ class Int<int value> {
>   int Value = value;
> }
> 
> +// CHECK: def v0
> +// CHECK: Value = 0
> +
> +// CHECK: def v1
> +// CHECK: Value = 1
> +
> def v1024   : Int<1024>;
> // CHECK: def v1024
> // CHECK: Value = 1024
> @@ -27,3 +33,5 @@ def v2048   : Int<!add(v1024.Value, v102
> // CHECK: def v2048
> // CHECK: Value = 2048
> 
> +def v0 : Int<!and(v1024.Value, v2048.Value)>;
> +def v1 : Int<!and(v1025.Value, 1)>;
> 
> 
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