[llvm] r214671 - CodeGen: silence a warning

[Saleem Abdulrasool]

Author: compnerd
Date: Sun Aug  3 18:00:38 2014
New Revision: 214671

URL: http://llvm.org/viewvc/llvm-project?rev=214671&view=rev
Log:
CodeGen: silence a warning

GCC 4.8.2 objects to the tautological condition in the assert as the unsigned
value is guaranteed to be >= 0.  Simplify the assertion by dropping the
tautological condition.

Modified:
    llvm/trunk/lib/CodeGen/MachineCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/MachineCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineCombiner.cpp?rev=214671&r1=214670&r2=214671&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineCombiner.cpp Sun Aug  3 18:00:38 2014
@@ -144,8 +144,7 @@ MachineCombiner::getDepth(SmallVectorImp
           InstrIdxForVirtReg.find(MO.getReg());
       if (II != InstrIdxForVirtReg.end()) {
         // Operand is new virtual register not in trace
-        assert(II->second >= 0 && II->second < InstrDepth.size() &&
-               "Bad Index");
+        assert(II->second < InstrDepth.size() && "Bad Index");
         MachineInstr *DefInstr = InsInstrs[II->second];
         assert(DefInstr &&
                "There must be a definition for a new virtual register");