[PATCH] R600/SI: Update MUBUF assembly string to match AMD proprietary compiler

Matt Arsenault arsenm2 at gmail.com
Thu Jul 31 20:00:09 PDT 2014


On Jul 31, 2014, at 6:37 PM, Tom Stellard <thomas.stellard at amd.com> wrote:

> 
> diff --git a/test/CodeGen/R600/private-memory.ll b/test/CodeGen/R600/private-memory.ll
> index 3ce8c2c..a69ca21 100644
> --- a/test/CodeGen/R600/private-memory.ll
> +++ b/test/CodeGen/R600/private-memory.ll
> @@ -16,8 +16,8 @@ declare i32 @llvm.r600.read.tidig.x() nounwind readnone
> ; SI-PROMOTE: DS_READ_B32
> ; SI-PROMOTE: DS_READ_B32
> 
> -; SI-ALLOCA: BUFFER_STORE_DWORD v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], v{{[0-9]+}}, s{{[0-9]+}}
> -; SI-ALLOCA: BUFFER_STORE_DWORD v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], v{{[0-9]+}}, s{{[0-9]+}}
> +; SI-ALLOCA: BUFFER_STORE_DWORD v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}}
> +; SI-ALLOCA: BUFFER_STORE_DWORD v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}}
> define void @mova_same_clause(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) {
> entry:
>   %stack = alloca [5 x i32], align 4
> @@ -116,9 +116,9 @@ for.end:
> 
> ; R600: MOVA_INT
> 
> -; SI-PROMOTE: BUFFER_STORE_SHORT v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], v{{[0-9]+}}, s{{[0-9]+}}
> -; SI-PROMOTE: BUFFER_STORE_SHORT v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], v{{[0-9]+}}, s{{[0-9]+}}
> -; SI_PROMOTE: BUFFER_LOAD_SSHORT v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}] + v{{[0-9]+}}, s{{[0-9]+}}
> +; SI-PROMOTE: BUFFER_STORE_SHORT v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}}
> +; SI-PROMOTE: BUFFER_STORE_SHORT v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}}
> +; SI_PROMOTE: BUFFER_LOAD_SSHORT v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}}

This updated SI_PROMOTE check line is still broken

Besides that, LGTM. Have you done this for the DS instructions yet? I’ve been meaning to get to that soon





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