[llvm] r214332 - Add BookE's tlbre, tlbwe and tlbivax instructions.

[Joerg Sonnenberger]

Author: joerg
Date: Wed Jul 30 15:44:04 2014
New Revision: 214332

URL: http://llvm.org/viewvc/llvm-project?rev=214332&view=rev
Log:
Add BookE's tlbre, tlbwe and tlbivax instructions.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
    llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
    llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=214332&r1=214331&r2=214332&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Wed Jul 30 15:44:04 2014
@@ -3103,6 +3103,21 @@ def TLBIEL : XForm_16b<31, 274, (outs),
 def TLBIE : XForm_26<31, 306, (outs), (ins gprc:$RS, gprc:$RB),
                           "tlbie $RB,$RS", IIC_SprTLBIE, []>;
 
+def TLBIVAX : I<31, (outs), (ins gprc:$RA, gprc:$RB), "tlbivax $RA, $RB",
+                IIC_LdStLoad>, Requires<[IsBookE]> {
+  bits<5> RA;
+  bits<5> RB;
+  let Inst{11-15} = RA;
+  let Inst{16-20} = RB;
+  let Inst{21-30} = 786;
+}
+
+def TLBRE : XForm_24_eieio<31, 946, (outs), (ins),
+                           "tlbre", IIC_LdStLoad, []>, Requires<[IsBookE]>;
+
+def TLBWE : XForm_24_eieio<31, 978, (outs), (ins),
+                           "tlbwe", IIC_LdStLoad, []>, Requires<[IsBookE]>;
+
 def RFI : XForm_0<19, 50, (outs), (ins), "rfi", IIC_BrB, []>,
                   Requires<[IsBookE]>;
 def RFCI : XForm_0<19, 51, (outs), (ins), "rfci", IIC_BrB, []>,

Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt?rev=214332&r1=214331&r2=214332&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt Wed Jul 30 15:44:04 2014
@@ -116,3 +116,10 @@
 0x7c 0x00 0x01 0x46
 # CHECK: wrteei 1
 0x7c 0x00 0x81 0x46
+
+# CHECK: tlbre
+0x7c 0x00 0x07 0x64
+# CHECK: tlbwe
+0x7c 0x00 0x07 0xa4
+# CHECK: tlbivax 11, 12
+0x7c 0x0b 0x66 0x24

Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s?rev=214332&r1=214331&r2=214332&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s Wed Jul 30 15:44:04 2014
@@ -172,3 +172,13 @@
 # CHECK-BE: wrteei 1                        # encoding: [0x7c,0x00,0x81,0x46]
 # CHECK-LE: wrteei 1                        # encoding: [0x46,0x81,0x00,0x7c]
             wrteei 1
+
+# CHECK-BE: tlbre                           # encoding: [0x7c,0x00,0x07,0x64]
+# CHECK-LE: tlbre                           # encoding: [0x64,0x07,0x00,0x7c]
+            tlbre
+# CHECK-BE: tlbwe                           # encoding: [0x7c,0x00,0x07,0xa4]
+# CHECK-LE: tlbwe                           # encoding: [0xa4,0x07,0x00,0x7c]
+            tlbwe
+# CHECK-BE: tlbivax 11, 12                  # encoding: [0x7c,0x0b,0x66,0x24]
+# CHECK-LE: tlbivax 11, 12                  # encoding: [0x24,0x66,0x0b,0x7c]
+            tlbivax %r11, %r12