[PATCH] [AArch64] Generate tbz/tbnz when comparing against zero.

Jiangning Liu liujiangning1 at gmail.com
Tue Jul 22 23:09:52 PDT 2014

Hi Chad,

2014-07-10 4:08 GMT+08:00 Chad Rosier <mcrosier at codeaurora.org>:

> Hi t.p.northover, jmolloy,
> This patch generates tbz/tbnz when comparing against zero.  The tbz/tbnz
> checks the sign bit to convert
> add/sub w1, w1, w10
> cmp w1, #0
> b.lt .LBB0_0
> to
> adds/subs w1, w1, w10
> tbnz w1, #31, .LBB0_0

I think there are two cases around this,

1) LHS can support flags update like ADDS/SUBS, and we can cover more like
ANDS, ORRS and others etc.
2) LHS can't support flags update and BR_CC is the only user. At
present performBRCONDCombine can cover this scenario.

The patch would be more complete if you can add more instructions for case

For case 2, it can be a separate patch, I think.


> Please have a look.
> On an A53 processor this improves the following benchmarks:
> office_suite/OAv2mark +3%
>  office_suite/rotatev2data* +6-10%
> I also saw improvements in spec2000 parser, vortex, and vpr, but just
> barely above noise, so I wouldn't bank on them.  These numbers were based
> on the community mainline.
>  Chad
> http://reviews.llvm.org/D4440
> Files:
>   lib/Target/AArch64/AArch64ISelLowering.cpp
>   test/CodeGen/AArch64/tbz-tbnz.ll
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