[PATCH] AVX intrinsics were broken on CPU with AVX-512 instruction set

[Adam Nemet]

>>! In D4605#8, @rob.khasanov wrote:
> Sorry I forget add context to the diff (-U999999).
> The bug is that AVX intrinsics is not generated with -mcpu=knl (and other cpu with AVX512 ISA).
> Running "llc < test/CodeGen/X86/avx-intrinsics-x86.ll -mtriple=x86_64-apple-darwin -march=x86 -mcpu=knl" you can see error: 
> LLVM ERROR: Cannot select: intrinsic %llvm.x86.sse2.add.sd
> 
> In this patch I just fix avx-intrinsics-x86.ll.

Ah, thanks!

> I found that the reason was incorrect predicates: they used UseAVX instead HasAVX, i changed this.

Hmm, don't we want an AVX512 version of the scalar operations as well to allow for the 32 vector registers?  We could probably tablegen these from the AVX definitions.  Although it looks like that for the packed versions we chose to duplicate them so that's probably what we want to do for scalar as well.

> However, after this fix some codegen tests for AVX512 instructions fails. Reason is generating AVX instructions instead of AVX512 on AVX512 tests, this is due to equal complexity of AVX and AVX512 patterns. So to fix this I added for AVX512 instructions patterns more complexity.

Yeah I don't think this is ideal.  Just like we didn't have to do this between SSE and AVX, it shouldn't be necessary between AVX512 and AVX.

Adam

http://reviews.llvm.org/D4605