[llvm] r213455 - R600: Implement a few simple TTI queries.

[Matt Arsenault]

Author: arsenm
Date: Sat Jul 19 13:15:16 2014
New Revision: 213455

URL: http://llvm.org/viewvc/llvm-project?rev=213455&view=rev
Log:
R600: Implement a few simple TTI queries.

I'm not sure if these have any effect right now.

Modified:
    llvm/trunk/lib/Target/R600/AMDGPUTargetTransformInfo.cpp

Modified: llvm/trunk/lib/Target/R600/AMDGPUTargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetTransformInfo.cpp?rev=213455&r1=213454&r2=213455&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUTargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUTargetTransformInfo.cpp Sat Jul 19 13:15:16 2014
@@ -79,6 +79,10 @@ public:
 
   PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const override;
 
+  unsigned getNumberOfRegisters(bool Vector) const override;
+  unsigned getRegisterBitWidth(bool Vector) const override;
+  unsigned getMaximumUnrollFactor() const override;
+
   /// @}
 };
 
@@ -127,3 +131,23 @@ AMDGPUTTI::getPopcntSupport(unsigned TyW
   assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
   return ST->hasBCNT(TyWidth) ? PSK_FastHardware : PSK_Software;
 }
+
+unsigned AMDGPUTTI::getNumberOfRegisters(bool Vec) const {
+  if (Vec)
+    return 0;
+
+  // Number of VGPRs on SI.
+  if (ST->getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS)
+    return 256;
+
+  return 4 * 128; // XXX - 4 channels. Should these count as vector instead?
+}
+
+unsigned AMDGPUTTI::getRegisterBitWidth(bool) const {
+  return 32;
+}
+
+unsigned AMDGPUTTI::getMaximumUnrollFactor() const {
+  // Semi-arbitrary large amount.
+  return 64;
+}