[PATCH 1/2] R600/SI: implement range reduction for sin/cos

[Matt Arsenault]

On Jul 17, 2014, at 2:50 PM, Grigori Goronzy <greg at chown.ath.cx> wrote:

> SDValue SITargetLowering::LowerTrig(SDValue Op, SelectionDAG &DAG) const {
> +  EVT VT = Op.getValueType();
> +  SDValue Arg = Op.getOperand(0);
> +  SDValue FractPart = DAG.getNode(AMDGPUISD::FRACT, SDLoc(Op), VT,
> +        DAG.getNode(ISD::FMUL, SDLoc(Op), VT, Arg,
> +          DAG.getConstantFP(0.5 / M_PI, MVT::f32)));

Use VT instead of MVT::f32 (or use f32 instead of VT everywhere)


> +  unsigned TrigNode;
> +
> +  switch (Op.getOpcode()) {
> +  case ISD::FCOS:
> +    TrigNode = AMDGPUISD::COS_HW;
> +    break;
> +  case ISD::FSIN:
> +    TrigNode = AMDGPUISD::SIN_HW;
> +    break;
> +  default:
> +    llvm_unreachable("Wrong trig opcode");
> +  }
> +
> +  return DAG.getNode(TrigNode, SDLoc(Op), VT, FractPart);

I’d prefer return getNode under the cases with the right opcode rather than introducing the temporary TrigNode variable and breaking.

Besides those minor things, LGTM


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