[llvm] r213029 - Improve test 'CodeGen/X86/combine-vec-shuffle-3.ll'.

Andrea Di Biagio Andrea_DiBiagio at sn.scee.net
Mon Jul 14 18:29:27 PDT 2014


Author: adibiagio
Date: Mon Jul 14 20:29:27 2014
New Revision: 213029

URL: http://llvm.org/viewvc/llvm-project?rev=213029&view=rev
Log:
Improve test 'CodeGen/X86/combine-vec-shuffle-3.ll'.
Now functions 'test4', 'test9', 'test14' and 'test19' correctly perform
a move of two packed values from the high quadword of vector %b to the low
quadword of vector %a (movhlps idiom).

No functional change intended.

Modified:
    llvm/trunk/test/CodeGen/X86/combine-vec-shuffle-3.ll

Modified: llvm/trunk/test/CodeGen/X86/combine-vec-shuffle-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-vec-shuffle-3.ll?rev=213029&r1=213028&r2=213029&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-vec-shuffle-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-vec-shuffle-3.ll Mon Jul 14 20:29:27 2014
@@ -31,7 +31,7 @@ define <4 x float> @test3(<4 x float> %a
 ; CHECK: ret
 
 define <4 x float> @test4(<4 x float> %a, <4 x float> %b) {
-  %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
+  %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 3, i32 5, i32 5>
   %2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
   ret <4 x float> %2
 }
@@ -40,7 +40,7 @@ define <4 x float> @test4(<4 x float> %a
 ; end up with the sub-optimal sequence 'shufps, palignr'.
 ; CHECK-LABEL: test4
 ; Mask: [6,7,2,3]
-; CHECK: shufps $84
+; CHECK: shufps $94
 ; CHECK: palignr $8
 ; CHECK: ret
 
@@ -86,7 +86,7 @@ define <4 x i32> @test8(<4 x i32> %a, <4
 ; CHECK: ret
 
 define <4 x i32> @test9(<4 x i32> %a, <4 x i32> %b) {
-  %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
+  %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 5, i32 5>
   %2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
   ret <4 x i32> %2
 }
@@ -94,7 +94,7 @@ define <4 x i32> @test9(<4 x i32> %a, <4
 ; shuffle mask [6,7,2,3] is not legal.
 ; CHECK-LABEL: test9
 ; Mask: [6,7,2,3]
-; CHECK: shufps $84
+; CHECK: shufps $94
 ; CHECK: palignr $8
 ; CHECK: ret
 
@@ -141,16 +141,16 @@ define <4 x float> @test13(<4 x float> %
 
 define <4 x float> @test14(<4 x float> %a, <4 x float> %b) {
   %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 5, i32 5>
-  %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
+  %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
   ret <4 x float> %2
 }
 ; FIXME: this should be lowered as a single movhlps. However, the backend
 ; wrongly thinks that shuffle mask [6,7,2,3] is not legal. Therefore, we
-; end up with the sub-optimal sequence 'pshufd, blendps'.
+; end up with the sub-optimal sequence 'pshufd, palignr'.
 ; CHECK-LABEL: test14
 ; Mask: [6,7,2,3]
 ; CHECK: pshufd $94
-; CHECK: blendps $12
+; CHECK: palignr $8
 ; CHECK: ret
 
 define <4 x float> @test15(<4 x float> %a, <4 x float> %b) {
@@ -196,7 +196,7 @@ define <4 x i32> @test18(<4 x i32> %a, <
 
 define <4 x i32> @test19(<4 x i32> %a, <4 x i32> %b) {
   %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 5, i32 5>
-  %2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
+  %2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
   ret <4 x i32> %2
 }
 ; FIXME: this should be lowered as a single movhlps. However, the backend
@@ -205,7 +205,7 @@ define <4 x i32> @test19(<4 x i32> %a, <
 ; CHECK-LABEL: test19
 ; Mask: [6,7,2,3]
 ; CHECK: pshufd $94
-; CHECK: blendps $12
+; CHECK: palignr $8
 ; CHECK: ret
 
 define <4 x i32> @test20(<4 x i32> %a, <4 x i32> %b) {





More information about the llvm-commits mailing list