[llvm] r212870 - R600: Add missing tests for some intrinsics
Matt Arsenault
Matthew.Arsenault at amd.com
Fri Jul 11 17:36:20 PDT 2014
Author: arsenm
Date: Fri Jul 11 19:36:19 2014
New Revision: 212870
URL: http://llvm.org/viewvc/llvm-project?rev=212870&view=rev
Log:
R600: Add missing tests for some intrinsics
Added:
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll
- copied, changed from r212855, llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll
llvm/trunk/test/CodeGen/R600/llvm.amdgpu.dp4.ll
llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll
- copied, changed from r212855, llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll
llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll
Modified:
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll
Copied: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll (from r212855, llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll?p2=llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll&p1=llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll&r1=212855&r2=212870&rev=212870&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll Fri Jul 11 19:36:19 2014
@@ -1,13 +1,16 @@
-; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
-; CHECK: GROUP_BARRIER
+; FUNC-LABEL: @test_barrier_global
+; EG: GROUP_BARRIER
+; SI: S_BARRIER
-define void @test(i32 addrspace(1)* %out) {
+define void @test_barrier_global(i32 addrspace(1)* %out) {
entry:
%0 = call i32 @llvm.r600.read.tidig.x()
%1 = getelementptr i32 addrspace(1)* %out, i32 %0
store i32 %0, i32 addrspace(1)* %1
- call void @llvm.AMDGPU.barrier.local()
+ call void @llvm.AMDGPU.barrier.global()
%2 = call i32 @llvm.r600.read.local.size.x()
%3 = sub i32 %2, 1
%4 = sub i32 %3, %0
@@ -17,8 +20,9 @@ entry:
ret void
}
+declare void @llvm.AMDGPU.barrier.global()
+
declare i32 @llvm.r600.read.tidig.x() #0
-declare void @llvm.AMDGPU.barrier.local()
declare i32 @llvm.r600.read.local.size.x() #0
attributes #0 = { readnone }
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll?rev=212870&r1=212869&r2=212870&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll Fri Jul 11 19:36:19 2014
@@ -1,8 +1,11 @@
-; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
-; CHECK: GROUP_BARRIER
+; FUNC-LABEL: @test_barrier_local
+; EG: GROUP_BARRIER
+; SI: S_BARRIER
-define void @test(i32 addrspace(1)* %out) {
+define void @test_barrier_local(i32 addrspace(1)* %out) {
entry:
%0 = call i32 @llvm.r600.read.tidig.x()
%1 = getelementptr i32 addrspace(1)* %out, i32 %0
@@ -17,8 +20,9 @@ entry:
ret void
}
-declare i32 @llvm.r600.read.tidig.x() #0
declare void @llvm.AMDGPU.barrier.local()
+
+declare i32 @llvm.r600.read.tidig.x() #0
declare i32 @llvm.r600.read.local.size.x() #0
attributes #0 = { readnone }
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll?rev=212870&r1=212869&r2=212870&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll Fri Jul 11 19:36:19 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI %s
+; RUN: llc -march=r600 -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: @kill_gs_const
; SI-NOT: V_CMPX_LE_F32
Added: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll?rev=212870&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll (added)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll Fri Jul 11 19:36:19 2014
@@ -0,0 +1,29 @@
+; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+
+declare double @llvm.AMDGPU.rcp.f64(double) nounwind readnone
+declare double @llvm.sqrt.f64(double) nounwind readnone
+
+; FUNC-LABEL: @rcp_f64
+; SI: V_RCP_F64_e32
+define void @rcp_f64(double addrspace(1)* %out, double %src) nounwind {
+ %rcp = call double @llvm.AMDGPU.rcp.f64(double %src) nounwind readnone
+ store double %rcp, double addrspace(1)* %out, align 8
+ ret void
+}
+
+; FUNC-LABEL: @rcp_pat_f64
+; SI: V_RCP_F64_e32
+define void @rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
+ %rcp = fdiv double 1.0, %src
+ store double %rcp, double addrspace(1)* %out, align 8
+ ret void
+}
+
+; FUNC-LABEL: @rsq_rcp_pat_f64
+; SI: V_RSQ_F64_e32
+define void @rsq_rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
+ %sqrt = call double @llvm.sqrt.f64(double %src) nounwind readnone
+ %rcp = call double @llvm.AMDGPU.rcp.f64(double %sqrt) nounwind readnone
+ store double %rcp, double addrspace(1)* %out, align 8
+ ret void
+}
Added: llvm/trunk/test/CodeGen/R600/llvm.amdgpu.dp4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.amdgpu.dp4.ll?rev=212870&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.amdgpu.dp4.ll (added)
+++ llvm/trunk/test/CodeGen/R600/llvm.amdgpu.dp4.ll Fri Jul 11 19:36:19 2014
@@ -0,0 +1,11 @@
+; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s
+
+declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) nounwind readnone
+
+define void @test_dp4(float addrspace(1)* %out, <4 x float> addrspace(1)* %a, <4 x float> addrspace(1)* %b) nounwind {
+ %src0 = load <4 x float> addrspace(1)* %a, align 16
+ %src1 = load <4 x float> addrspace(1)* %b, align 16
+ %dp4 = call float @llvm.AMDGPU.dp4(<4 x float> %src0, <4 x float> %src1) nounwind readnone
+ store float %dp4, float addrspace(1)* %out, align 4
+ ret void
+}
Copied: llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll (from r212855, llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll?p2=llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll&p1=llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll&r1=212855&r2=212870&rev=212870&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll Fri Jul 11 19:36:19 2014
@@ -1,21 +1,19 @@
-; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI %s
+; RUN: llc -march=r600 -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
-; SI-LABEL: @kill_gs_const
-; SI-NOT: V_CMPX_LE_F32
+; SI-LABEL: @kilp_gs_const
; SI: S_MOV_B64 exec, 0
-
-define void @kill_gs_const() #0 {
+define void @kilp_gs_const() #0 {
main_body:
%0 = icmp ule i32 0, 3
%1 = select i1 %0, float 1.000000e+00, float -1.000000e+00
- call void @llvm.AMDGPU.kill(float %1)
+ call void @llvm.AMDGPU.kilp(float %1)
%2 = icmp ule i32 3, 0
%3 = select i1 %2, float 1.000000e+00, float -1.000000e+00
- call void @llvm.AMDGPU.kill(float %3)
+ call void @llvm.AMDGPU.kilp(float %3)
ret void
}
-declare void @llvm.AMDGPU.kill(float)
+declare void @llvm.AMDGPU.kilp(float)
attributes #0 = { "ShaderType"="2" }
Added: llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll?rev=212870&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll (added)
+++ llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll Fri Jul 11 19:36:19 2014
@@ -0,0 +1,12 @@
+; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+
+declare float @llvm.AMDGPU.lrp(float, float, float) nounwind readnone
+
+; FUNC-LABEL: @test_lrp
+; SI: V_SUB_F32
+; SI: V_MAD_F32
+define void @test_lrp(float addrspace(1)* %out, float %src0, float %src1, float %src2) nounwind {
+ %mad = call float @llvm.AMDGPU.lrp(float %src0, float %src1, float %src2) nounwind readnone
+ store float %mad, float addrspace(1)* %out, align 4
+ ret void
+}
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