[llvm] r212443 - CodeGen: it turns out that NAND is not the same thing as BIC. At all.
duncan.sands at gmail.com
Wed Jul 9 07:47:16 PDT 2014
> I do not often modify the docs, so please feel free to critique harshly. ;)
> A small patch is attached.
> Index: ReleaseNotes.rst
> --- ReleaseNotes.rst (revision 212617)
> +++ ReleaseNotes.rst (working copy)
> @@ -59,6 +59,9 @@
> * The prefix for loop vectorizer hint metadata has been changed from
> ``llvm.vectorizer`` to ``llvm.loop.vectorize``.
> +* Some backends previously implemented Atomic NAND as NEGATE-and-AND. The
> + semantics of this operation have been updated to NOT-AND.
> .. NOTE
> For small 1-3 sentence descriptions, just add an entry at the end of
> this list. If your description won't fit comfortably in one bullet
I suggest you say something like:
* Some backends previously implemented Atomic NAND as NEGATE-and-AND. Now all
backends implement it as NOT-AND, matching the semantics of GCC 4.4 and later.
More information about the llvm-commits