[llvm] r212443 - CodeGen: it turns out that NAND is not the same thing as BIC. At all.
cameron.mcinally at nyu.edu
Mon Jul 7 06:58:24 PDT 2014
On Mon, Jul 7, 2014 at 9:44 AM, Hal Finkel <hfinkel at anl.gov> wrote:
> ----- Original Message -----
>> From: "Duncan Sands" <duncan.sands at gmail.com>
>> To: llvm-commits at cs.uiuc.edu
>> Sent: Monday, July 7, 2014 4:35:37 AM
>> Subject: Re: [llvm] r212443 - CodeGen: it turns out that NAND is not the same thing as BIC. At all.
>> Hi Tim,
>> On 07/07/14 11:06, Tim Northover wrote:
>> > Author: tnorthover
>> > Date: Mon Jul 7 04:06:35 2014
>> > New Revision: 212443
>> > URL: http://llvm.org/viewvc/llvm-project?rev=212443&view=rev
>> > Log:
>> > CodeGen: it turns out that NAND is not the same thing as BIC. At
>> > all.
>> > We've been performing the wrong operation on ARM for "atomicrmw
>> > nand" for
>> > years, since "a NAND b" is "~(a & b)" rather than ARM's very
>> > tempting "a & ~b".
>> > This bled over into the generic expansion pass.
>> > So I assume no-one has ever actually tried to do an atomic nand in
>> > the real
>> > world. Oh well.
>> this may have been a feature, not a mistake: it might simply have
>> been trying to
>> be compatible with GCC which also did a & ~b for atomic nand for
>> years (it was
>> even documented to be this way). The semantics were changed to ~(a &
>> b) in GCC
>> 4.4. See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=37908
> Is this a problem, then, because we claim compatibility with gcc 4.2.1? I wonder if this breaks anything in the wild.
If it helps... I intended to change this in 2011, but dropped the ball
on non-X86 backends.
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