[PATCH] Refactor ARM subarchitecture parsing.

[Gabor Ballabas]

================
Comment at: lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp:163
@@ +162,3 @@
+    break;
+  case Triple::v4t:
+    ARMArchFeature = "+v4t";
----------------
Renato Golin wrote:
> Gabor Ballabas wrote:
> > Renato Golin wrote:
> > > you could add the NoSubArch here, as a default.
> > I tried to add it, but it made 12 tests fail:
> > Failing Tests (12):
> >     LLVM :: CodeGen/ARM/2010-03-18-ldm-rtrn.ll
> >     LLVM :: CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll
> >     LLVM :: CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll
> >     LLVM :: CodeGen/ARM/arguments.ll
> >     LLVM :: CodeGen/ARM/armv4.ll
> >     LLVM :: CodeGen/ARM/call_nolink.ll
> >     LLVM :: CodeGen/ARM/debug-frame.ll
> >     LLVM :: CodeGen/ARM/ehabi.ll
> >     LLVM :: CodeGen/ARM/inlineasm-ldr-pseudo.ll
> >     LLVM :: CodeGen/ARM/integer_insertelement.ll
> >     LLVM :: CodeGen/ARM/jump_tables.ll
> >     LLVM :: MC/ARM/arm-thumb-cpus.s
> Interesting... Maybe the default sub-arch should be v4 not v4t.
Yes, that works. I'm going to add 'v4' as default, and add the ARMSubArch prefixes that Tim suggested.

http://reviews.llvm.org/D4375