[PATCH] [AArch64] Change default legalization behavior of v1i32 to be widen to v2i32 instead of scalarization

Chandler Carruth chandlerc at gmail.com
Wed Jul 2 17:31:30 PDT 2014


Sorry if I'm stepping on any toes, but I'm going to commit this (having made Tim's requested changes) so that myself and some others can do stuff on top of this really excellent hook in various other backends.

Thanks so much to Hao for working on this and with Tim for building some really nice infrastructure. It's kind of amazing how many problems in different backends this will likely help us address!

================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:7897-7899
@@ +7896,5 @@
+    return TypeWidenVector;
+  if (VT.getVectorNumElements() == 1)
+    return TypeScalarizeVector;
+  return TypePromoteInteger;
+}
----------------
Tim Northover wrote:
> Could you change this to "return TargetLoweringBase::getPreferredVectorAction(VT)"? It makes it clearer we're not overriding anything else.
FYI, I did this.

================
Comment at: lib/Target/NVPTX/NVPTXISelLowering.cpp:478-481
@@ +477,6 @@
+NVPTXTargetLowering::getPreferredVectorAction(EVT VT) const {
+  if (VT.getVectorNumElements() == 1)
+    return TypeScalarizeVector;
+  if (VT.getScalarType() == MVT::i1)
+    return TypeSplitVector;
+  return TypePromoteInteger;
----------------
Tim Northover wrote:
> Similarly, I think these might be clearer as "if (VT.getVectorNumElements() != 1 && VT.getScalarType() == MVT::i1)" followed by deferring to the base implementation.
And this.

================
Comment at: lib/Target/R600/SIISelLowering.cpp:274-280
@@ -273,4 +273,9 @@
 
-bool SITargetLowering::shouldSplitVectorType(EVT VT) const {
-  return VT.getScalarType().bitsLE(MVT::i16);
+TargetLoweringBase::LegalizeTypeAction
+SITargetLowering::getPreferredVectorAction(EVT VT) const {
+  if (VT.getVectorNumElements() == 1)
+    return TypeScalarizeVector;
+  if (VT.getScalarType().bitsLE(MVT::i16))
+    return TypeSplitVector;
+  return TypePromoteInteger;
 }
----------------
Matt Arsenault wrote:
> I think this should be TypeSplitVector for any vector > 128 bits, and TypePromoteInteger for scalar types < 32-bits and no more than 4 elements. I can take care of that later though
Similarly to other targets, I switched this to delegate to the base class. I'll let you add the custom logic you want for R600 in a follow-up patch.

http://reviews.llvm.org/D4322






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