[PATCH 1/1] R600: Implement float to long/ulong

Matt Arsenault Matthew.Arsenault at amd.com
Tue Jun 24 14:17:39 PDT 2014


On 06/24/2014 02:10 PM, Jan Vesely wrote:
>      // Expand f32 -> i64 conversion
> +    // This algorithm comes from compiler-rt's implementation of fixsfdi:
> +    //https://github.com/llvm-mirror/compiler-rt/blob/master/lib/builtins/fixsfdi.c
> +    EVT VT = N->getOperand(0).getValueType();
> +    EVT NVT = N->getValueType(0);
> +    SDValue Op = SDValue(N, 0);
> +    SDLoc DL(Op);
> +    EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
> +    SDValue ExponentMask = DAG.getConstant(0x7F800000, IntVT);
> +    SDValue ExponentLoBit = DAG.getConstant(23, IntVT);
> +    SDValue Bias = DAG.getConstant(127, IntVT);
> +    SDValue SignMask = DAG.getConstant(APInt::getSignBit(VT.getSizeInBits()),
> +                                       IntVT);
> +    SDValue SignLowBit = DAG.getConstant(VT.getSizeInBits() - 1, IntVT);
> +    SDValue MantissaMask = DAG.getConstant(0x007FFFFF, IntVT);
> +
> +    SDValue Bits = DAG.getNode(ISD::BITCAST, DL, IntVT, N->getOperand(0));
> +
> +    SDValue ExponentBits = DAG.getNode(ISD::SRL, DL, IntVT,
> +        DAG.getNode(ISD::AND, DL, IntVT, Bits, ExponentMask),
> +        DAG.getZExtOrTrunc(ExponentLoBit, DL, getShiftAmountTy(IntVT)));
> +    SDValue Exponent = DAG.getNode(ISD::SUB, DL, IntVT, ExponentBits, Bias);
> +
> +    SDValue Sign = DAG.getNode(ISD::SRA, DL, IntVT,
> +        DAG.getNode(ISD::AND, DL, IntVT, Bits, SignMask),
> +        DAG.getZExtOrTrunc(SignLowBit, DL, getShiftAmountTy(IntVT)));
> +    Sign = DAG.getSExtOrTrunc(Sign, DL, NVT);
> +
> +    SDValue R = DAG.getNode(ISD::OR, DL, IntVT,
> +        DAG.getNode(ISD::AND, DL, IntVT, Bits, MantissaMask),
> +        DAG.getConstant(0x00800000, IntVT));
> +
> +    R = DAG.getZExtOrTrunc(R, DL, NVT);
> +
> +
> +    R = DAG.getSelectCC(DL, Exponent, ExponentLoBit,
> +       DAG.getNode(ISD::SHL, DL, NVT, R,
> +                   DAG.getZExtOrTrunc(
> +                      DAG.getNode(ISD::SUB, DL, IntVT, Exponent, ExponentLoBit),
> +                      DL, getShiftAmountTy(IntVT))),
> +       DAG.getNode(ISD::SRL, DL, NVT, R,
> +                   DAG.getZExtOrTrunc(
> +                      DAG.getNode(ISD::SUB, DL, IntVT, ExponentLoBit, Exponent),
> +                      DL, getShiftAmountTy(IntVT))),
> +       ISD::SETGT);
> +
> +    SDValue Ret = DAG.getNode(ISD::SUB, DL, NVT,
> +        DAG.getNode(ISD::XOR, DL, NVT, R, Sign),
> +        Sign);
> +
> +    Results.push_back(DAG.getSelectCC(DL, Exponent, DAG.getConstant(0, IntVT),
> +        DAG.getConstant(0, NVT), Ret, ISD::SETLT));
>       return;
I would prefer if this was split into its own function like 
LowerFPTOUINT is. With that fixed, LGTM



More information about the llvm-commits mailing list