[llvm] r211037 - Refactor the disabling of Thumb-1 LDM/STM generation

[James Molloy]

Hi Evgeniy,

Thanks! Fixed in r211097.

Cheers,

James

> -----Original Message-----
> From: Evgeniy Stepanov [mailto:eugeni.stepanov at gmail.com]
> Sent: 17 June 2014 13:31
> To: Eric Christopher
> Cc: James Molloy; llvm-commits
> Subject: Re: [llvm] r211037 - Refactor the disabling of Thumb-1 LDM/STM
> generation
> 
> This is leaking RegScavenger() in ARMLoadStoreOpt::runOnMachineFunction().
> http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-
> bootstrap/builds/3733
> 
> On Mon, Jun 16, 2014 at 9:06 PM, Eric Christopher <echristo at gmail.com>
> wrote:
> > Thanks James!
> >
> > On Jun 16, 2014 9:54 AM, "James Molloy" <james.molloy at arm.com> wrote:
> >>
> >> Author: jamesm
> >> Date: Mon Jun 16 11:42:53 2014
> >> New Revision: 211037
> >>
> >> URL: http://llvm.org/viewvc/llvm-project?rev=211037&view=rev
> >> Log:
> >> Refactor the disabling of Thumb-1 LDM/STM generation
> >>
> >> Originally I switched the LD/ST optimizer off in TargetMachine as it
> was
> >> previously, but Eric has suggested he'd prefer that it be short-
> circuited in
> >> the pass itself.
> >>
> >> No functionality change.
> >>
> >>
> >> Modified:
> >>     llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
> >>     llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
> >>
> >> Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
> >> URL:
> >> http://llvm.org/viewvc/llvm-
> project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=211037&r1=
> 211036&r2=211037&view=diff
> >>
> >>
> ==========================================================================
> ====
> >> --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
> >> +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Mon Jun 16
> >> 11:42:53 2014
> >> @@ -1734,6 +1734,10 @@ bool ARMLoadStoreOpt::runOnMachineFuncti
> >>    isThumb2 = AFI->isThumb2Function();
> >>    isThumb1 = AFI->isThumbFunction() && !isThumb2;
> >>
> >> +  // FIXME: Temporarily disabling for Thumb-1 due to miscompiles
> >> +  if (isThumb1)
> >> +    return false;
> >> +
> >>    bool Modified = false;
> >>    for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI
> !=
> >> E;
> >>         ++MFI) {
> >>
> >> Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
> >> URL:
> >> http://llvm.org/viewvc/llvm-
> project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=211037&r1=21103
> 6&r2=211037&view=diff
> >>
> >>
> ==========================================================================
> ====
> >> --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
> >> +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Mon Jun 16 11:42:53
> >> 2014
> >> @@ -203,8 +203,7 @@ bool ARMPassConfig::addInstSelector() {
> >>  }
> >>
> >>  bool ARMPassConfig::addPreRegAlloc() {
> >> -  // FIXME: Temporarily disabling Thumb-1 pre-RA Load/Store
> optimization
> >> pass
> >> -  if (getOptLevel() != CodeGenOpt::None &&
> >> !getARMSubtarget().isThumb1Only())
> >> +  if (getOptLevel() != CodeGenOpt::None)
> >>      addPass(createARMLoadStoreOptimizationPass(true));
> >>    if (getOptLevel() != CodeGenOpt::None &&
> >> getARMSubtarget().isCortexA9())
> >>      addPass(createMLxExpansionPass());
> >> @@ -219,11 +218,8 @@ bool ARMPassConfig::addPreRegAlloc() {
> >>
> >>  bool ARMPassConfig::addPreSched2() {
> >>    if (getOptLevel() != CodeGenOpt::None) {
> >> -    // FIXME: Temporarily disabling Thumb-1 post-RA Load/Store
> >> optimization pass
> >> -    if (!getARMSubtarget().isThumb1Only()) {
> >> -      addPass(createARMLoadStoreOptimizationPass());
> >> -      printAndVerify("After ARM load / store optimizer");
> >> -    }
> >> +    addPass(createARMLoadStoreOptimizationPass());
> >> +    printAndVerify("After ARM load / store optimizer");
> >>
> >>      if (getARMSubtarget().hasNEON())
> >>        addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
> >>
> >>
> >> _______________________________________________
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> >> llvm-commits at cs.uiuc.edu
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> >
> >
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