[llvm] r210789 - Disable the load/store optimization pass for Thumb-1.

Eric Christopher echristo at gmail.com
Mon Jun 16 10:57:28 PDT 2014 

Thanks James!

-eric

On Mon, Jun 16, 2014 at 9:51 AM, James Molloy <james at jamesmolloy.co.uk> wrote:
> Hi Eric,
>
> Done, in r211037.
>
> Cheers,
>
> James
>
>
> On 16 June 2014 09:06, James Molloy <james at jamesmolloy.co.uk> wrote:
>>
>> Sure. I'll fix it after I've had my morning coffee. Bad things can happen
>> if I commit before then.
>>
>>
>> On 15 June 2014 21:07, Eric Christopher <echristo at gmail.com> wrote:
>>>
>>> On Sun, Jun 15, 2014 at 11:41 AM, James Molloy <james at jamesmolloy.co.uk>
>>> wrote:
>>> > Hi Eric,
>>> >
>>> > Sure. Sorry, I didn't know there was a preferred way of doing this. The
>>> > reason I did it like I did was simply that was how it was disabled
>>> > before
>>> > Moritz reenabled it!
>>> >
>>>
>>> No worries. Mind fixing it? :)
>>>
>>> -eric
>>>
>>> > I'll bear in mind for the future.
>>> > Cheers,
>>> >
>>> > James
>>> >
>>> >
>>> > On 15 June 2014 02:48, Eric Christopher <echristo at gmail.com> wrote:
>>> >>
>>> >>
>>> >> On Jun 14, 2014 6:39 PM, "David Blaikie" <dblaikie at gmail.com> wrote:
>>> >> >
>>> >> > I know already, but it might be useful to explain why (especially
>>> >> > given that there are other examples of similar code there already).
>>> >> >
>>> >>
>>> >> Good idea. :)
>>> >>
>>> >> > My half-baked attempt: James: the subtarget may vary from function
>>> >> > to
>>> >> > function (in Eric's glorious ifunc future) and he'd like to have
>>> >> > just
>>> >> > one pass pipeline that can be used for all functions, even across
>>> >> > subtarget variations. While the world isn't there yet, it'd be nice
>>> >> > to
>>> >> > avoid making more work.
>>> >> >
>>> >> > Eric - are there passes that already do this? Precedent to point to
>>> >> > for an example of the way you think will work? Or is it all
>>> >> > backwards
>>> >> > for now?
>>> >>
>>> >> X86, PPC, aarch64, and I thought arm all did it this way. I fixed them
>>> >> a
>>> >> while back.
>>> >>
>>> >> -eric
>>> >>
>>> >> >
>>> >> > - David
>>> >> >
>>> >> > On Sat, Jun 14, 2014 at 6:27 PM, Eric Christopher
>>> >> > <echristo at gmail.com>
>>> >> > wrote:
>>> >> > > Please don't do this in this way, just have the pass return that
>>> >> > > it
>>> >> > > did no
>>> >> > > work rather than conditionally including it in the pipeline.
>>> >> > >
>>> >> > > Thanks. :)
>>> >> > >
>>> >> > > -eric
>>> >> > >
>>> >> > > On Jun 12, 2014 8:29 AM, "James Molloy" <james.molloy at arm.com>
>>> >> > > wrote:
>>> >> > >>
>>> >> > >> Author: jamesm
>>> >> > >> Date: Thu Jun 12 10:18:33 2014
>>> >> > >> New Revision: 210789
>>> >> > >>
>>> >> > >> URL: http://llvm.org/viewvc/llvm-project?rev=210789&view=rev
>>> >> > >> Log:
>>> >> > >> Disable the load/store optimization pass for Thumb-1.
>>> >> > >>
>>> >> > >> Moritz's changes have improved codegen a lot, but further testing
>>> >> > >> showed
>>> >> > >> significant correctness problems. Disable by default until these
>>> >> > >> have
>>> >> > >> been
>>> >> > >> worked out.
>>> >> > >>
>>> >> > >> Patch by Moritz Roth!
>>> >> > >>
>>> >> > >> Modified:
>>> >> > >>     llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
>>> >> > >>
>>> >> > >> llvm/trunk/test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll
>>> >> > >>     llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll
>>> >> > >>     llvm/trunk/test/CodeGen/Thumb/thumb-ldm.ll
>>> >> > >>     llvm/trunk/test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll
>>> >> > >>
>>> >> > >> Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
>>> >> > >> URL:
>>> >> > >>
>>> >> > >>
>>> >> > >> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=210789&r1=210788&r2=210789&view=diff
>>> >> > >>
>>> >> > >>
>>> >> > >>
>>> >> > >> ==============================================================================
>>> >> > >> --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
>>> >> > >> +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Thu Jun 12
>>> >> > >> 10:18:33
>>> >> > >> 2014
>>> >> > >> @@ -265,7 +265,8 @@ bool ARMPassConfig::addInstSelector() {
>>> >> > >>  }
>>> >> > >>
>>> >> > >>  bool ARMPassConfig::addPreRegAlloc() {
>>> >> > >> -  if (getOptLevel() != CodeGenOpt::None)
>>> >> > >> +  // FIXME: Temporarily disabling Thumb-1 pre-RA Load/Store
>>> >> > >> optimization
>>> >> > >> pass
>>> >> > >> +  if (getOptLevel() != CodeGenOpt::None &&
>>> >> > >> !getARMSubtarget().isThumb1Only())
>>> >> > >>      addPass(createARMLoadStoreOptimizationPass(true));
>>> >> > >>    if (getOptLevel() != CodeGenOpt::None &&
>>> >> > >> getARMSubtarget().isCortexA9())
>>> >> > >>      addPass(createMLxExpansionPass());
>>> >> > >> @@ -280,8 +281,11 @@ bool ARMPassConfig::addPreRegAlloc() {
>>> >> > >>
>>> >> > >>  bool ARMPassConfig::addPreSched2() {
>>> >> > >>    if (getOptLevel() != CodeGenOpt::None) {
>>> >> > >> -    addPass(createARMLoadStoreOptimizationPass());
>>> >> > >> -    printAndVerify("After ARM load / store optimizer");
>>> >> > >> +    // FIXME: Temporarily disabling Thumb-1 post-RA Load/Store
>>> >> > >> optimization pass
>>> >> > >> +    if (!getARMSubtarget().isThumb1Only()) {
>>> >> > >> +      addPass(createARMLoadStoreOptimizationPass());
>>> >> > >> +      printAndVerify("After ARM load / store optimizer");
>>> >> > >> +    }
>>> >> > >>
>>> >> > >>      if (getARMSubtarget().hasNEON())
>>> >> > >>
>>> >> > >> addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
>>> >> > >>
>>> >> > >> Modified:
>>> >> > >> llvm/trunk/test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll
>>> >> > >> URL:
>>> >> > >>
>>> >> > >>
>>> >> > >> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll?rev=210789&r1=210788&r2=210789&view=diff
>>> >> > >>
>>> >> > >>
>>> >> > >>
>>> >> > >> ==============================================================================
>>> >> > >> ---
>>> >> > >> llvm/trunk/test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll
>>> >> > >> (original)
>>> >> > >> +++
>>> >> > >> llvm/trunk/test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll
>>> >> > >> Thu
>>> >> > >> Jun 12 10:18:33 2014
>>> >> > >> @@ -1,4 +1,5 @@
>>> >> > >>  ; RUN: llc < %s -mtriple=thumbv6m-eabi -o - | FileCheck %s
>>> >> > >> +; XFAIL: *
>>> >> > >>
>>> >> > >>  define void @foo(i32* %A) #0 {
>>> >> > >>  entry:
>>> >> > >>
>>> >> > >> Modified: llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll
>>> >> > >> URL:
>>> >> > >>
>>> >> > >>
>>> >> > >> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll?rev=210789&r1=210788&r2=210789&view=diff
>>> >> > >>
>>> >> > >>
>>> >> > >>
>>> >> > >> ==============================================================================
>>> >> > >> --- llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll (original)
>>> >> > >> +++ llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll Thu Jun 12
>>> >> > >> 10:18:33
>>> >> > >> 2014
>>> >> > >> @@ -1,5 +1,5 @@
>>> >> > >> -; RUN: llc < %s -mtriple=thumb-apple-darwin
>>> >> > >> -disable-cgp-branch-opts
>>> >> > >> -disable-post-ra | FileCheck %s -check-prefix=CHECK
>>> >> > >> -check-prefix=RA_GREEDY
>>> >> > >> -; RUN: llc < %s -mtriple=thumb-apple-darwin
>>> >> > >> -disable-cgp-branch-opts
>>> >> > >> -disable-post-ra -regalloc=basic | FileCheck %s
>>> >> > >> -check-prefix=CHECK
>>> >> > >> -check-prefix=RA_BASIC
>>> >> > >> +; RUN: llc < %s -mtriple=thumb-apple-darwin
>>> >> > >> -disable-cgp-branch-opts
>>> >> > >> -disable-post-ra | FileCheck %s
>>> >> > >> +; RUN: llc < %s -mtriple=thumb-apple-darwin
>>> >> > >> -disable-cgp-branch-opts
>>> >> > >> -disable-post-ra -regalloc=basic | FileCheck %s
>>> >> > >>
>>> >> > >>         %struct.state = type { i32, %struct.info*, float**, i32,
>>> >> > >> i32,
>>> >> > >> i32,
>>> >> > >> i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
>>> >> > >>         %struct.info = type { i32, i32, i32, i32, i32, i32, i32,
>>> >> > >> i8*
>>> >> > >> }
>>> >> > >> @@ -45,8 +45,7 @@ define void @t2(%struct.comment* %vc, i8
>>> >> > >>  ; CHECK: sub sp, #
>>> >> > >>  ; CHECK: mov r[[R0:[0-9]+]], sp
>>> >> > >>  ; CHECK: str r{{[0-9+]}}, [r[[R0]]
>>> >> > >> -; RA_GREEDY: str r{{[0-9+]}}, [r[[R0]]
>>> >> > >> -; RA_BASIC: stm r[[R0]]!
>>> >> > >> +; CHECK: str r{{[0-9+]}}, [r[[R0]]
>>> >> > >>  ; CHECK-NOT: ldr r0, [sp
>>> >> > >>  ; CHECK: mov r[[R1:[0-9]+]], sp
>>> >> > >>  ; CHECK: subs r[[R2:[0-9]+]], r[[R1]], r{{[0-9]+}}
>>> >> > >>
>>> >> > >> Modified: llvm/trunk/test/CodeGen/Thumb/thumb-ldm.ll
>>> >> > >> URL:
>>> >> > >>
>>> >> > >>
>>> >> > >> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/thumb-ldm.ll?rev=210789&r1=210788&r2=210789&view=diff
>>> >> > >>
>>> >> > >>
>>> >> > >>
>>> >> > >> ==============================================================================
>>> >> > >> --- llvm/trunk/test/CodeGen/Thumb/thumb-ldm.ll (original)
>>> >> > >> +++ llvm/trunk/test/CodeGen/Thumb/thumb-ldm.ll Thu Jun 12
>>> >> > >> 10:18:33
>>> >> > >> 2014
>>> >> > >> @@ -1,4 +1,5 @@
>>> >> > >>  ; RUN: llc < %s -mtriple=thumbv6m-eabi -o - | FileCheck %s
>>> >> > >> +; XFAIL: *
>>> >> > >>
>>> >> > >>  @X = external global [0 x i32]          ; <[0 x i32]*> [#uses=5]
>>> >> > >>
>>> >> > >>
>>> >> > >> Modified: llvm/trunk/test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll
>>> >> > >> URL:
>>> >> > >>
>>> >> > >>
>>> >> > >> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll?rev=210789&r1=210788&r2=210789&view=diff
>>> >> > >>
>>> >> > >>
>>> >> > >>
>>> >> > >> ==============================================================================
>>> >> > >> --- llvm/trunk/test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll
>>> >> > >> (original)
>>> >> > >> +++ llvm/trunk/test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll Thu Jun
>>> >> > >> 12
>>> >> > >> 10:18:33 2014
>>> >> > >> @@ -1,4 +1,5 @@
>>> >> > >>  ; RUN: llc -mtriple=thumbv6m-eabi %s -o - | FileCheck %s
>>> >> > >> +; XFAIL: *
>>> >> > >>
>>> >> > >>  @d = external global [64 x i32]
>>> >> > >>  @s = external global [64 x i32]
>>> >> > >>
>>> >> > >>
>>> >> > >> _______________________________________________
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>>> >> > >
>>> >> > >
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>>> >> > >
>>> >>
>>> >>
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>>
>>
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