[llvm] r210709 - [FastISel][X86] Add support for the frameaddress intrinsic.

Eric Christopher echristo at gmail.com
Wed Jun 11 17:52:00 PDT 2014


The new testcase doesn't look quite like the ones that were removed?

-eric

On Wed, Jun 11, 2014 at 2:44 PM, Juergen Ributzka <juergen at apple.com> wrote:
> Author: ributzka
> Date: Wed Jun 11 16:44:44 2014
> New Revision: 210709
>
> URL: http://llvm.org/viewvc/llvm-project?rev=210709&view=rev
> Log:
> [FastISel][X86] Add support for the frameaddress intrinsic.
>
> Added:
>     llvm/trunk/test/CodeGen/X86/frameaddr.ll
> Removed:
>     llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll
>     llvm/trunk/test/CodeGen/X86/x86-frameaddr.ll
>     llvm/trunk/test/CodeGen/X86/x86-frameaddr2.ll
> Modified:
>     llvm/trunk/lib/Target/X86/X86FastISel.cpp
>
> Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=210709&r1=210708&r2=210709&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Wed Jun 11 16:44:44 2014
> @@ -1653,6 +1653,58 @@ bool X86FastISel::X86VisitIntrinsicCall(
>    // FIXME: Handle more intrinsics.
>    switch (I.getIntrinsicID()) {
>    default: return false;
> +  case Intrinsic::frameaddress: {
> +    Type *RetTy = I.getCalledFunction()->getReturnType();
> +
> +    MVT VT;
> +    if (!isTypeLegal(RetTy, VT))
> +      return false;
> +
> +    unsigned Opc;
> +    const TargetRegisterClass *RC = nullptr;
> +
> +    switch (VT.SimpleTy) {
> +    default: llvm_unreachable("Invalid result type for frameaddress.");
> +    case MVT::i32: Opc = X86::MOV32rm; RC = &X86::GR32RegClass; break;
> +    case MVT::i64: Opc = X86::MOV64rm; RC = &X86::GR64RegClass; break;
> +    }
> +
> +    // This needs to be set before we call getFrameRegister, otherwise we get
> +    // the wrong frame register.
> +    MachineFrameInfo *MFI = FuncInfo.MF->getFrameInfo();
> +    MFI->setFrameAddressIsTaken(true);
> +
> +    const X86RegisterInfo *RegInfo =
> +      static_cast<const X86RegisterInfo*>(TM.getRegisterInfo());
> +    unsigned FrameReg = RegInfo->getFrameRegister(*(FuncInfo.MF));
> +    assert(((FrameReg == X86::RBP && VT == MVT::i64) ||
> +            (FrameReg == X86::EBP && VT == MVT::i32)) &&
> +           "Invalid Frame Register!");
> +
> +    // Always make a copy of the frame register to to a vreg first, so that we
> +    // never directly reference the frame register (the TwoAddressInstruction-
> +    // Pass doesn't like that).
> +    unsigned SrcReg = createResultReg(RC);
> +    BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
> +            TII.get(TargetOpcode::COPY), SrcReg).addReg(FrameReg);
> +
> +    // Now recursively load from the frame address.
> +    // movq (%rbp), %rax
> +    // movq (%rax), %rax
> +    // movq (%rax), %rax
> +    // ...
> +    unsigned DestReg;
> +    unsigned Depth = cast<ConstantInt>(I.getOperand(0))->getZExtValue();
> +    while (Depth--) {
> +      DestReg = createResultReg(RC);
> +      addDirectMem(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
> +                           TII.get(Opc), DestReg), SrcReg);
> +      SrcReg = DestReg;
> +    }
> +
> +    UpdateValueMap(&I, SrcReg);
> +    return true;
> +  }
>    case Intrinsic::memcpy: {
>      const MemCpyInst &MCI = cast<MemCpyInst>(I);
>      // Don't handle volatile or variable length memcpys.
>
> Added: llvm/trunk/test/CodeGen/X86/frameaddr.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/frameaddr.ll?rev=210709&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/frameaddr.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/frameaddr.ll Wed Jun 11 16:44:44 2014
> @@ -0,0 +1,27 @@
> +; RUN: llc < %s -march=x86                                | FileCheck %s --check-prefix=CHECK-32
> +; RUN: llc < %s -march=x86    -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-32
> +; RUN: llc < %s -march=x86-64                             | FileCheck %s --check-prefix=CHECK-64
> +; RUN: llc < %s -march=x86-64 -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-64
> +
> +define i8* @test1() nounwind {
> +entry:
> +; CHECK-32:      movl %esp, %ebp
> +; CHECK-32-NEXT: movl %ebp, %eax
> +; CHECK-64:      movq %rsp, %rbp
> +; CHECK-64-NEXT: movq %rbp, %rax
> +  %0 = tail call i8* @llvm.frameaddress(i32 0)
> +  ret i8* %0
> +}
> +
> +define i8* @test2() nounwind {
> +entry:
> +; CHECK-32:      movl %esp, %ebp
> +; CHECK-32-NEXT: movl (%ebp), %eax
> +; CHECK-32-NEXT: movl (%eax), %eax
> +; CHECK-64:      movq %rsp, %rbp
> +; CHECK-64-NEXT: movq (%rbp), %rax
> +; CHECK-64-NEXT: movq (%rax), %rax
> +  %0 = tail call i8* @llvm.frameaddress(i32 2)
> +  ret i8* %0
> +}
> +declare i8* @llvm.frameaddress(i32) nounwind readnone
>
> Removed: llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll?rev=210708&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll (removed)
> @@ -1,15 +0,0 @@
> -; RUN: llc < %s -march=x86-64 | FileCheck %s
> -
> -; CHECK: stack_end_address
> -; CHECK: {{movq.+rbp.*$}}
> -; CHECK: {{movq.+rbp.*$}}
> -; CHECK: ret
> -
> -define i64* @stack_end_address() nounwind  {
> -entry:
> -       tail call i8* @llvm.frameaddress( i32 0 )
> -       bitcast i8* %0 to i64*
> -       ret i64* %1
> -}
> -
> -declare i8* @llvm.frameaddress(i32) nounwind readnone
>
> Removed: llvm/trunk/test/CodeGen/X86/x86-frameaddr.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-frameaddr.ll?rev=210708&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/x86-frameaddr.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/x86-frameaddr.ll (removed)
> @@ -1,9 +0,0 @@
> -; RUN: llc < %s -march=x86 | grep mov | grep ebp
> -
> -define i8* @t() nounwind {
> -entry:
> -       %0 = tail call i8* @llvm.frameaddress(i32 0)
> -       ret i8* %0
> -}
> -
> -declare i8* @llvm.frameaddress(i32) nounwind readnone
>
> Removed: llvm/trunk/test/CodeGen/X86/x86-frameaddr2.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-frameaddr2.ll?rev=210708&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/x86-frameaddr2.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/x86-frameaddr2.ll (removed)
> @@ -1,9 +0,0 @@
> -; RUN: llc < %s -march=x86 | grep mov | count 3
> -
> -define i8* @t() nounwind {
> -entry:
> -       %0 = tail call i8* @llvm.frameaddress(i32 2)
> -       ret i8* %0
> -}
> -
> -declare i8* @llvm.frameaddress(i32) nounwind readnone
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



More information about the llvm-commits mailing list