[PATCH] Fixing inst-combine not to drops nsw when combining adds into mul (PR19263)

Rafael Ávila de Espíndola rafael.espindola at gmail.com
Thu Jun 5 10:29:29 PDT 2014


> All tests still pass if I delete the extra logic from
> WillNotOverflowSignedAdd. Can you add an extra test of split this off
> to an independent patch?


More importantly, it looks like this misoptimizes a few cases. For example,

define i16 @f(i16 %a) {
       %b = mul i16 %a, 2
       %c = mul i16 %a, 3
       %d = add nsw i16 %b, %c
       ret i16 %d
}

this would optimize it into

define i16 @f(i16 %a) {
  %d = mul nsw i16 %a, 5
  ret i16 %d
}

But I think that is invalid. There are inputs where the original add
would not overflow the add but the mul will. For example:

a = 0x2aab
b = 0x5556
c = 0x8001 // the computation of c has an overflow, but that is fine
since the mul is not nws
d = 0xd557 // no overflow in the add

Cheers,
Rafael

http://reviews.llvm.org/D3799






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