[llvm] r209799 - Rename a test case to contain correct date info.

Hao Liu haoliuts at gmail.com
Thu May 29 23:07:29 PDT 2014


Oh, I didn't know that is never used. I've renamed several test cases
in r209877.

Thanks,
-Hao

2014-05-30 0:36 GMT+08:00 David Blaikie <dblaikie at gmail.com>:
> On Thu, May 29, 2014 at 2:21 AM, Hao Liu <Hao.Liu at arm.com> wrote:
>> Author: haoliu
>> Date: Thu May 29 04:21:23 2014
>> New Revision: 209799
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=209799&view=rev
>> Log:
>> Rename a test case to contain correct date info.
>
> As a general rule we don't put dates in test case names anymore. Those
> that are there are mostly legacy from the early days of the LLVM
> project.
>
>>
>> Added:
>>     llvm/trunk/test/CodeGen/AArch64/2014-05-29-shrink-v1i64.ll
>> Removed:
>>     llvm/trunk/test/CodeGen/AArch64/2014-05-16-shrink-v1i64.ll
>>
>> Removed: llvm/trunk/test/CodeGen/AArch64/2014-05-16-shrink-v1i64.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/2014-05-16-shrink-v1i64.ll?rev=209798&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/AArch64/2014-05-16-shrink-v1i64.ll (original)
>> +++ llvm/trunk/test/CodeGen/AArch64/2014-05-16-shrink-v1i64.ll (removed)
>> @@ -1,14 +0,0 @@
>> -; RUN: llc -march=arm64 < %s
>> -
>> -; The DAGCombiner tries to do following shrink:
>> -;     Convert x+y to (VT)((SmallVT)x+(SmallVT)y)
>> -; But currently it can't handle vector type and will trigger an assertion failure
>> -; when it tries to generate an add mixed using vector type and scaler type.
>> -; This test checks that such assertion failur should not happen.
>> -define <1 x i64> @dotest(<1 x i64> %in0) {
>> -entry:
>> -  %0 = add <1 x i64> %in0, %in0
>> -  %vshl_n = shl <1 x i64> %0, <i64 32>
>> -  %vsra_n = ashr <1 x i64> %vshl_n, <i64 32>
>> -  ret <1 x i64> %vsra_n
>> -}
>>
>> Added: llvm/trunk/test/CodeGen/AArch64/2014-05-29-shrink-v1i64.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/2014-05-29-shrink-v1i64.ll?rev=209799&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/AArch64/2014-05-29-shrink-v1i64.ll (added)
>> +++ llvm/trunk/test/CodeGen/AArch64/2014-05-29-shrink-v1i64.ll Thu May 29 04:21:23 2014
>> @@ -0,0 +1,14 @@
>> +; RUN: llc -march=arm64 < %s
>> +
>> +; The DAGCombiner tries to do following shrink:
>> +;     Convert x+y to (VT)((SmallVT)x+(SmallVT)y)
>> +; But currently it can't handle vector type and will trigger an assertion failure
>> +; when it tries to generate an add mixed using vector type and scaler type.
>> +; This test checks that such assertion failur should not happen.
>> +define <1 x i64> @dotest(<1 x i64> %in0) {
>> +entry:
>> +  %0 = add <1 x i64> %in0, %in0
>> +  %vshl_n = shl <1 x i64> %0, <i64 32>
>> +  %vsra_n = ashr <1 x i64> %vshl_n, <i64 32>
>> +  ret <1 x i64> %vsra_n
>> +}
>>
>>
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