[llvm] r209267 - ARM: correct bundle generation for MOV32T relocations
Saleem Abdulrasool
compnerd at compnerd.org
Tue May 20 18:25:24 PDT 2014
Author: compnerd
Date: Tue May 20 20:25:24 2014
New Revision: 209267
URL: http://llvm.org/viewvc/llvm-project?rev=209267&view=rev
Log:
ARM: correct bundle generation for MOV32T relocations
Although the previous code would construct a bundle and add the correct elements
to it, it would not finalise the bundle. This resulted in the InternalRead
markers not being added to the MachineOperands nor, more importantly, the
externally visible defs to the bundle itself. So, although the bundle was not
exposing the def, the generated code would be correct because there was no
optimisations being performed. When optimisations were enabled, the post
register allocator would kick in, and the hazard recognizer would reorder
operations around the load which would define the value being operated upon.
Rather than manually constructing the bundle, simply construct and finalise the
bundle via the finaliseBundle call after both MIs have been emitted. This
improves the code generation with optimisations where IMAGE_REL_ARM_MOV32T
relocations are emitted.
The changes to the other tests are the result of the bundle generation
preventing the scheduler from hoisting the moves across the loads. The net
effect of the generated code is equivalent, but, is much more identical to what
is actually being lowered.
Added:
llvm/trunk/test/CodeGen/ARM/Windows/mov32t-bundling.ll
Modified:
llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
llvm/trunk/test/CodeGen/ARM/Windows/chkstk.ll
llvm/trunk/test/CodeGen/ARM/Windows/memset.ll
Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=209267&r1=209266&r2=209267&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Tue May 20 20:25:24 2014
@@ -22,6 +22,7 @@
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/Support/CommandLine.h"
@@ -697,9 +698,6 @@ void ARMExpandPseudo::ExpandMOV32BitImm(
HI16Opc = ARM::MOVTi16;
}
- if (RequiresBundling)
- BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(TargetOpcode::BUNDLE));
-
LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg);
HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc))
.addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
@@ -735,10 +733,8 @@ void ARMExpandPseudo::ExpandMOV32BitImm(
LO16.addImm(Pred).addReg(PredReg);
HI16.addImm(Pred).addReg(PredReg);
- if (RequiresBundling) {
- LO16->bundleWithPred();
- HI16->bundleWithPred();
- }
+ if (RequiresBundling)
+ finalizeBundle(MBB, &*LO16, &*MBBI);
TransferImpOps(MI, LO16, HI16);
MI.eraseFromParent();
Modified: llvm/trunk/test/CodeGen/ARM/Windows/chkstk.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/Windows/chkstk.ll?rev=209267&r1=209266&r2=209267&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/Windows/chkstk.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/Windows/chkstk.ll Tue May 20 20:25:24 2014
@@ -16,9 +16,9 @@ entry:
; CHECK-DEFAULT-CODE-MODEL: sub.w sp, sp, r4
; CHECK-LARGE-CODE-MODEL: check_watermark:
-; CHECK-LARGE-CODE-MODEL: movw r4, #1024
; CHECK-LARGE-CODE-MODEL: movw r12, :lower16:__chkstk
; CHECK-LARGE-CODE-MODEL: movt r12, :upper16:__chkstk
+; CHECK-LARGE-CODE-MODEL: movw r4, #1024
; CHECK-LARGE-CODE-MODEL: blx r12
; CHECK-LARGE-CODE-MODEL: sub.w sp, sp, r4
Modified: llvm/trunk/test/CodeGen/ARM/Windows/memset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/Windows/memset.ll?rev=209267&r1=209266&r2=209267&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/Windows/memset.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/Windows/memset.ll Tue May 20 20:25:24 2014
@@ -10,9 +10,9 @@ entry:
unreachable
}
-; CHECK: movs r1, #0
-; CHECK: mov.w r2, #512
; CHECK: movw r0, :lower16:source
; CHECK: movt r0, :upper16:source
+; CHECK: movs r1, #0
+; CHECK: mov.w r2, #512
; CHECK: memset
Added: llvm/trunk/test/CodeGen/ARM/Windows/mov32t-bundling.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/Windows/mov32t-bundling.ll?rev=209267&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/Windows/mov32t-bundling.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/Windows/mov32t-bundling.ll Tue May 20 20:25:24 2014
@@ -0,0 +1,28 @@
+; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
+
+ at _begin = external global i8
+ at _end = external global i8
+
+declare arm_aapcs_vfpcc void @force_emission()
+
+define arm_aapcs_vfpcc void @bundle() {
+entry:
+ br i1 icmp uge (i32 sub (i32 ptrtoint (i8* @_end to i32), i32 ptrtoint (i8* @_begin to i32)), i32 4), label %if.then, label %if.end
+
+if.then:
+ tail call arm_aapcs_vfpcc void @force_emission()
+ br label %if.end
+
+if.end:
+ ret void
+}
+
+; CHECK-LABEL: bundle
+; CHECK-NOT: subs r0, r1, r0
+; CHECK: movw r0, :lower16:_begin
+; CHECK-NEXT: movt r0, :upper16:_begin
+; CHECK-NEXT: movw r1, :lower16:_end
+; CHECK-NEXT: movt r1, :upper16:_end
+; CHECK-NEXT: subs r0, r1, r0
+; CHECK-NEXT: cmp r0, #4
+
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