[PATCH] R600: Add intrinsics for mad24

Matt Arsenault arsenm2 at gmail.com
Thu May 15 09:34:03 PDT 2014

On May 15, 2014, at 6:17 AM, Tom Stellard <tom at stellard.net> wrote:

>> let Predicates = [isCayman] in {
>> def MULADD_INT24_cm : R600_3OP <0x08, "MULADD_INT24",
>> -  [(set i32:$dst, (add (AMDGPUmul_i24 i32:$src0, i32:$src1), i32:$src2))], VecALU
>> +  [(set i32:$dst, (AMDGPUmad_i24 i32:$src0, i32:$src1, i32:$src2))], VecALU
>>> ;
>> def MUL_INT24_cm : R600_2OP <0x5B, "MUL_INT24",
>>   [(set i32:$dst, (AMDGPUmul_i24 i32:$src0, i32:$src1))], VecALU
>>> ;
>> +def : IMad24Pat<MULADD_INT24_cm>;
>> +
> We need to add a fall-back pattern for targets that don't support 24-bit
> ops.  Pre-Evergreen doesn't have 24-bit ops and Evergreen only supports 24-bit
> unsigned operations.
> -Tom

Why? The pattern matching the multiply pattern is under the isCayman predicate, so it won’t be matched. I’m also not sure it’s expected that intrinsics for a feature will work for subtargets without it. However, I have been thinking it would be easier to handle feature nodes like this by expanding them on targets without these features in ISelDAGToDAG::PreprocessISelDAG

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