[PATCH] TableGen: use PrintMethod to print more aliases

Tim Northover t.p.northover at gmail.com
Fri May 9 10:09:03 PDT 2014


Hi,

Currently, TableGen is very conservative about the aliases it is capable of printing: any kind of Operand Record in the InstAlias, except for some explicitly understood Registers, means that TableGen will simply skip the alias for printing purposes.

This completely relaxes that restriction: a complicated Operand is assumed to *always* be printed and any available PrintMethod is used. For out of tree targets, the previous behaviour can be restored by setting "Emit" to 0 in any InstAlias. In the future a more flexible predication mechanism might be useful.

This seems to have affected 3.5 targets:
+ ARM64/AArch64: I made some fairly minimal changes here to reduce the number of tests that need rewriting. The rest are deferred for later.
+ Mips: it looked like both aliases for "break" should have been printed, but .td file order was significant so I swapped them.
+ x86: I couldn't find any documentation on whether "imull $3, %eax, %eax" (for example) should print as "imull $3, %eax". Given the prevalence of 2-operand instructions I decided it probably should and updated the test.

Does the change look OK?

Cheers.

Tim.

http://reviews.llvm.org/D3706

Files:
  lib/Target/AArch64/AArch64InstrInfo.td
  lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
  lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h
  lib/Target/ARM64/ARM64InstrFormats.td
  lib/Target/ARM64/ARM64InstrInfo.td
  lib/Target/ARM64/ARM64RegisterInfo.td
  lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
  lib/Target/ARM64/InstPrinter/ARM64InstPrinter.h
  lib/Target/Mips/InstPrinter/MipsInstPrinter.h
  lib/Target/Mips/MipsInstrInfo.td
  lib/Target/Sparc/InstPrinter/SparcInstPrinter.h
  lib/Target/X86/InstPrinter/X86ATTInstPrinter.h
  test/CodeGen/AArch64/addsub-shifted.ll
  test/CodeGen/AArch64/cond-sel.ll
  test/CodeGen/AArch64/directcond.ll
  test/CodeGen/AArch64/extract.ll
  test/CodeGen/AArch64/flags-multiuse.ll
  test/CodeGen/AArch64/fp128.ll
  test/CodeGen/AArch64/neon-select_cc.ll
  test/CodeGen/ARM64/atomic-128.ll
  test/CodeGen/ARM64/cast-opt.ll
  test/CodeGen/ARM64/csel.ll
  test/CodeGen/ARM64/extract.ll
  test/CodeGen/ARM64/fast-isel-fcmp.ll
  test/CodeGen/ARM64/fast-isel-icmp.ll
  test/CodeGen/ARM64/fcmp-opt.ll
  test/CodeGen/ARM64/fp128.ll
  test/CodeGen/ARM64/icmp-opt.ll
  test/CodeGen/ARM64/neon-v1i1-setcc.ll
  test/CodeGen/ARM64/xaluo.ll
  test/CodeGen/X86/divide-by-constant.ll
  test/MC/AArch64/basic-a64-instructions.s
  test/MC/ARM64/aliases.s
  test/MC/Disassembler/AArch64/basic-a64-instructions.txt
  test/MC/Mips/micromips-control-instructions.s
  test/MC/Mips/mips-control-instructions.s
  test/MC/X86/x86-64.s
  utils/TableGen/AsmWriterEmitter.cpp
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D3706.9266.patch
Type: text/x-patch
Size: 84509 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20140509/23930be4/attachment.bin>


More information about the llvm-commits mailing list