[PATCH] Implement Named Register Global Variables in LLVM

Rafael EspĂ­ndola rafael.espindola at gmail.com
Tue May 6 05:41:22 PDT 2014


Warning: There is no register reservation at the moment, and so far it
only works with the stack pointer on selected architectures (ARM, ARM64,
x86_64 and AArch64). Work to include a wider bank of registers is in
progress.

Please make it clear that work to include allocatable registers is
*not* under way. That is a much harder and brittler feature.  We need
a full discussion an llvmdev before claiming that we may ever support
it.

on the named-reg-alloc.ll tests, please include a fixme about
producing a more specific error message about allocatable registers.



On 6 May 2014 05:44, Renato Golin <renato.golin at linaro.org> wrote:
> + Adding some negative tests
> + Changing docs to reflect on stack register usage only
>
> The latter was preferred to adding more non-allocatable registers, since there aren't many that could be added without further consideration and I don't want to delay this patch longer than it needs to. So, for the time being, only stack registers will be allowed as a named register.
>
> http://reviews.llvm.org/D3261
>
> Files:
>   docs/LangRef.rst
>   include/llvm/CodeGen/ISDOpcodes.h
>   include/llvm/CodeGen/SelectionDAGISel.h
>   include/llvm/IR/Intrinsics.td
>   include/llvm/Target/TargetLowering.h
>   lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>   lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>   lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
>   lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
>   lib/Target/AArch64/AArch64ISelLowering.cpp
>   lib/Target/AArch64/AArch64ISelLowering.h
>   lib/Target/ARM/ARMISelLowering.cpp
>   lib/Target/ARM/ARMISelLowering.h
>   lib/Target/ARM64/ARM64ISelLowering.cpp
>   lib/Target/ARM64/ARM64ISelLowering.h
>   lib/Target/X86/X86ISelLowering.cpp
>   lib/Target/X86/X86ISelLowering.h
>   test/CodeGen/AArch64/named-reg-alloc.ll
>   test/CodeGen/AArch64/named-reg-notareg.ll
>   test/CodeGen/AArch64/stackpointer.ll
>   test/CodeGen/ARM/named-reg-alloc.ll
>   test/CodeGen/ARM/named-reg-notareg.ll
>   test/CodeGen/ARM/stackpointer.ll
>   test/CodeGen/ARM64/named-reg-alloc.ll
>   test/CodeGen/ARM64/named-reg-notareg.ll
>   test/CodeGen/ARM64/stackpointer.ll
>   test/CodeGen/X86/named-reg-alloc.ll
>   test/CodeGen/X86/named-reg-notareg.ll
>   test/CodeGen/X86/stackpointer.ll




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