[PATCH 1/5] R600: Expand vector sin and cos on r600.

[Tom Stellard]

On Wed, Apr 30, 2014 at 07:56:24PM -0400, Jan Vesely wrote:
> On Tue, 2014-04-22 at 13:36 +0200, Christian König wrote:
> > > So there's no way to make vector elements to work items, and execute
> > > only one instruction? I should read the specs more carefully.
> > 
> > No, at least not a halve way sane one. Work items are controlled by the 
> > application, e.g. it's the parallelization of work into different 
> > execution thread as exposed by interfaces like OpenCL or OpenGL.
> > 
> > But the vector instructions of LLVM are parallelization of work by 
> > working on multiple data elements in the same thread.
> > 
> > Don't be confused allot of people mix that up,
> > Christian.
> 
> Thanks for the explanation. I did not really connect work-items with
> threads when reading it the first time. The confusing part was that EG
> manual refers to Trans only instructions as scalar (still executed in
> every thread).
> 
> Tom, thanks for pushing the other patches, is there anything I need to
> change with v2 of sin cos expansion?
> 

You just need to move the lowering into AMDGPUISelLowering.cpp, so it
works for SI too.

-Tom

> thank you,
> Jan
> 
> 
> > 
> > Am 22.04.2014 03:16, schrieb Jan Vesely:
> > > On Mon, 2014-04-21 at 13:51 -0700, Tom Stellard wrote:
> > >> On Sun, Apr 20, 2014 at 04:57:51PM -0400, Jan Vesely wrote:
> > >>> Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
> > >>> ---
> > >>>   lib/Target/R600/R600ISelLowering.cpp | 11 +++++++++++
> > >>>   1 file changed, 11 insertions(+)
> > >>>
> > >>> diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
> > >>> index ecffee2..a6304d8 100644
> > >>> --- a/lib/Target/R600/R600ISelLowering.cpp
> > >>> +++ b/lib/Target/R600/R600ISelLowering.cpp
> > >>> @@ -141,6 +141,17 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
> > >>>     setTargetDAGCombine(ISD::SELECT_CC);
> > >>>     setTargetDAGCombine(ISD::INSERT_VECTOR_ELT);
> > >>>   
> > >>> +  static const MVT::SimpleValueType FloatTypes[] = {
> > >>> +    MVT::v2f32, MVT::v4f32
> > >>> +  };
> > >>> +  const size_t NumFloatTypes = array_lengthof(FloatTypes);
> > >>> +
> > >>> +  for (unsigned int x = 0; x < NumFloatTypes; ++x) {
> > >>> +    MVT::SimpleValueType VT = FloatTypes[x];
> > >>> +    setOperationAction(ISD::FCOS, VT, Expand);
> > >>> +    setOperationAction(ISD::FSIN, VT, Expand);
> > >>> +  }
> > >>> +
> > >> There actually aren't vector instructions for these on SI, so this
> > >> should go in AMDGPUISelLowering.cpp.  It's confusing because the instructions
> > >> V_SIN_F32 and V_COS_F32 are 'Vector Instructions', but in this case it means they
> > >> execute on a vector of work items, and each work item provides scalar input.
> > > So there's no way to make vector elements to work items, and execute
> > > only one instruction? I should read the specs more carefully.
> > >
> > > I've attached v2, simplified and squashed with tests(including SI).
> > >
> > > regards,
> > > Jan
> > >
> > >> -Tom
> > >>
> > >>>     setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
> > >>>   
> > >>>     setBooleanContents(ZeroOrNegativeOneBooleanContent);
> > >>> -- 
> > >>> 1.9.0
> > >>>
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> > >
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> > 
> 
> -- 
> Jan Vesely <jan.vesely at rutgers.edu>