[PATCH] [ARM64] Enable feature predicates for NEON / FP / CRYPTO.

Tim Northover t.p.northover at gmail.com
Wed Apr 16 05:39:21 PDT 2014


  Hi Kevin,

  I think this mostly looks fine. I've got a couple of minor questions though:


================
Comment at: lib/Target/ARM64/ARM64CallingConvention.td:50
@@ -49,3 +49,3 @@
                                    [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
-  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32, v2f64],
+  CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64],
            CCAssignToReg<[Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
----------------
Doesn't the first change make this unnecessary? I'm confused.

================
Comment at: lib/Target/ARM64/ARM64ISelLowering.cpp:93-94
@@ +92,4 @@
+    addRegisterClass(MVT::f128, &ARM64::FPR128RegClass);
+    addRegisterClass(MVT::v16i8, &ARM64::FPR8RegClass);
+    addRegisterClass(MVT::v8i16, &ARM64::FPR16RegClass);
+  }
----------------
I *think* these lines are for the SISD support, which probably means they should be under hasNEON. (Actually, I'm rather confused about their entire existence, but that's the only explanation I can come up with).


http://reviews.llvm.org/D3396






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