[llvm] r206282 - AArch64/ARM64: add more arm64 lines to AArch64 regression tests

Tim Northover tnorthover at apple.com
Tue Apr 15 06:59:44 PDT 2014


Author: tnorthover
Date: Tue Apr 15 08:59:44 2014
New Revision: 206282

URL: http://llvm.org/viewvc/llvm-project?rev=206282&view=rev
Log:
AArch64/ARM64: add more arm64 lines to AArch64 regression tests

Modified:
    llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll
    llvm/trunk/test/CodeGen/AArch64/extern-weak.ll
    llvm/trunk/test/CodeGen/AArch64/extract.ll
    llvm/trunk/test/CodeGen/AArch64/fcmp.ll

Modified: llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll?rev=206282&r1=206281&r2=206282&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll Tue Apr 15 08:59:44 2014
@@ -1,11 +1,16 @@
-; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK-AARCH64
+; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-apple-ios7.0 | FileCheck %s --check-prefix=CHECK-ARM64
 
 ; Check  trunc i64 operation is translated as a subregister access
 ; eliminating an i32 induction varible.
-; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, #1
-; CHECK-NOT: add {{w[0-9]+}}, {{w[0-9]+}}, #1
-; CHECK-NEXT: cmp {{w[0-9]+}}, {{w[0-9]+}}, uxtw
-define void @test1_signed([8 x i8]* nocapture %a, i8* nocapture readonly %box, i8 %limit) {
+; CHECK-AARCH64: add {{x[0-9]+}}, {{x[0-9]+}}, #1
+; CHECK-AARCH64-NOT: add {{w[0-9]+}}, {{w[0-9]+}}, #1
+; CHECK-AARCH64-NEXT: cmp {{w[0-9]+}}, {{w[0-9]+}}, uxtw
+
+; CHECK-ARM64-NOT: add {{x[0-9]+}}, {{x[0-9]+}}, #1
+; CHECK-ARM64: add {{w[0-9]+}}, {{w[0-9]+}}, #1
+; CHECK-ARM64-NEXT: cmp {{w[0-9]+}}, {{w[0-9]+}}
+define void @test1_signed([8 x i8]* nocapture %a, i8* nocapture readonly %box, i8 %limit) minsize {
 entry:
   %conv = zext i8 %limit to i32
   %cmp223 = icmp eq i8 %limit, 0

Modified: llvm/trunk/test/CodeGen/AArch64/extern-weak.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/extern-weak.ll?rev=206282&r1=206281&r2=206282&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/extern-weak.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/extern-weak.ll Tue Apr 15 08:59:44 2014
@@ -1,5 +1,7 @@
-; RUN: llc -mtriple=aarch64-none-linux-gnu -o - < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-none-linux-gnu -o - < %s | FileCheck %s --check-prefix=CHECK-AARCH64
 ; RUN: llc -mtriple=aarch64-none-linux-gnu -code-model=large -o - < %s | FileCheck --check-prefix=CHECK-LARGE %s
+; RUN: llc -mtriple=arm64-none-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK-ARM64
+; RUN: llc -mtriple=arm64-none-linux-gnu -code-model=large -o - %s | FileCheck --check-prefix=CHECK-LARGE %s
 
 declare extern_weak i32 @var()
 
@@ -7,10 +9,13 @@ define i32()* @foo() {
 ; The usual ADRP/ADD pair can't be used for a weak reference because it must
 ; evaluate to 0 if the symbol is undefined. We use a litpool entry.
   ret i32()* @var
-; CHECK: .LCPI0_0:
-; CHECK-NEXT: .xword var
+; CHECK-AARCH64: .LCPI0_0:
+; CHECK-AARCH64-NEXT: .xword var
 
-; CHECK: ldr x0, [{{x[0-9]+}}, #:lo12:.LCPI0_0]
+; CHECK-AARCH64: ldr x0, [{{x[0-9]+}}, #:lo12:.LCPI0_0]
+
+; CHECK-ARM64: adrp x[[ADDRHI:[0-9]+]], :got:var
+; CHECK-ARM64: ldr x0, [x[[ADDRHI]], :got_lo12:var]
 
   ; In the large model, the usual relocations are absolute and can
   ; materialise 0.
@@ -25,27 +30,35 @@ define i32()* @foo() {
 
 define i32* @bar() {
   %addr = getelementptr [10 x i32]* @arr_var, i32 0, i32 5
-; CHECK: .LCPI1_0:
-; CHECK-NEXT: .xword arr_var
+; CHECK-AARCH64: .LCPI1_0:
+; CHECK-AARCH64-NEXT: .xword arr_var
+
+; CHECK-AARCH64: ldr [[BASE:x[0-9]+]], [{{x[0-9]+}}, #:lo12:.LCPI1_0]
+; CHECK-AARCH64: add x0, [[BASE]], #20
+
+; CHECK-ARM64: adrp x[[ADDRHI:[0-9]+]], :got:arr_var
+; CHECK-ARM64: ldr [[BASE:x[0-9]+]], [x[[ADDRHI]], :got_lo12:arr_var]
+; CHECK-ARM64: add x0, [[BASE]], #20
 
-; CHECK: ldr [[BASE:x[0-9]+]], [{{x[0-9]+}}, #:lo12:.LCPI1_0]
-; CHECK: add x0, [[BASE]], #20
   ret i32* %addr
 
   ; In the large model, the usual relocations are absolute and can
   ; materialise 0.
-; CHECK-LARGE: movz x0, #:abs_g3:arr_var
-; CHECK-LARGE: movk x0, #:abs_g2_nc:arr_var
-; CHECK-LARGE: movk x0, #:abs_g1_nc:arr_var
-; CHECK-LARGE: movk x0, #:abs_g0_nc:arr_var
+; CHECK-LARGE: movz [[ADDR:x[0-9]+]], #:abs_g3:arr_var
+; CHECK-LARGE: movk [[ADDR]], #:abs_g2_nc:arr_var
+; CHECK-LARGE: movk [[ADDR]], #:abs_g1_nc:arr_var
+; CHECK-LARGE: movk [[ADDR]], #:abs_g0_nc:arr_var
 }
 
 @defined_weak_var = internal unnamed_addr global i32 0
 
 define i32* @wibble() {
   ret i32* @defined_weak_var
-; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var
-; CHECK: add x0, [[BASE]], #:lo12:defined_weak_var
+; CHECK-AARCH64: adrp [[BASE:x[0-9]+]], defined_weak_var
+; CHECK-AARCH64: add x0, [[BASE]], #:lo12:defined_weak_var
+
+; CHECK-ARM64: adrp [[BASE:x[0-9]+]], defined_weak_var
+; CHECK-ARM64: add x0, [[BASE]], :lo12:defined_weak_var
 
 ; CHECK-LARGE: movz x0, #:abs_g3:defined_weak_var
 ; CHECK-LARGE: movk x0, #:abs_g2_nc:defined_weak_var

Modified: llvm/trunk/test/CodeGen/AArch64/extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/extract.ll?rev=206282&r1=206281&r2=206282&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/extract.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/extract.ll Tue Apr 15 08:59:44 2014
@@ -1,4 +1,5 @@
 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
+; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
 
 define i64 @ror_i64(i64 %in) {
 ; CHECK-LABEL: ror_i64:

Modified: llvm/trunk/test/CodeGen/AArch64/fcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fcmp.ll?rev=206282&r1=206281&r2=206282&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fcmp.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/fcmp.ll Tue Apr 15 08:59:44 2014
@@ -1,4 +1,5 @@
 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
+; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-linux-gnu | FileCheck %s
 
 declare void @bar(i32)
 





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