[PATCH] Implement Named Register Global Variables in LLVM

[Tim Northover]

  Hi Renato,

  I like the metadata change.

  > On all targets, lowering READ/WRITE nodes and getting the string literal are identical. Is there a place I can common them up?

  I'd be tempted to make them legal and handle it in SelectionDAGISel. There's a function SelectCodeCommon that seems to deal with the (similar INLINEASM) nodes.

  On the llvm_unreachable thing, how about using "report_fatal_error" instead? Might be a bit friendlier if the front-end isn't doing the validation.

  Also, could we have ARM64 support in there? That's most likely going to be the long-term AArch64 backend, and it'd be good not to have to merge it across manually.

  Cheers.

  Tim


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:2426
@@ +2425,3 @@
+  unsigned Reg = StringSwitch<unsigned>(RegName)
+                       .Cases("xsp", "stack", AArch64::XSP)
+                       .Default(0);
----------------
I don't think "xsp" exists (even in GNU as). The 64-bit stack pointer is universally referred to as "sp" as far as I can tell.

================
Comment at: docs/LangRef.rst:6818-6820
@@ +6817,5 @@
+
+The behaviour of the program when the register is used by interleaving
+code is undefined, but it's as undefined as its usage from register variables,
+inline assembly associations ``asm("sp")`` etc. in user code.
+
----------------
Undefined is undefined. There's no wiggle-room to it. "Unspecified" is probably the closest C standard term here.

================
Comment at: docs/LangRef.rst:6811-6812
@@ +6810,4 @@
+
+Pointer types are used to make sure it has the same bit width as the
+register itself.
+
----------------
I'd make it polymorphic. I suspect quite a few targets have pointer types that are inadequate to represent all registers (for various reasons).


http://reviews.llvm.org/D3261