[LLVMdev] 3.4.1 Release Plans

Tom Stellard tom at stellard.net
Wed Apr 9 08:57:40 PDT 2014


On Wed, Apr 09, 2014 at 01:18:58AM -0500, Hal Finkel wrote:
> ----- Original Message -----
> > From: "Tom Stellard" <tom at stellard.net>
> > To: "Hal Finkel" <hfinkel at anl.gov>
> > Cc: "Andrew Trick" <atrick at apple.com>, "Owen Anderson" <owen at apple.com>, "Evan Cheng" <evan.cheng at apple.com>, "nadav"
> > <nadav at apple.com>, "Ben Pope" <benpope81 at gmail.com>, llvmdev at cs.uiuc.edu, "Erik Verbruggen" <erik.verbruggen at me.com>
> > Sent: Tuesday, April 8, 2014 4:52:19 PM
> > Subject: Re: [LLVMdev] 3.4.1 Release Plans
> > 
> > On Tue, Apr 08, 2014 at 11:53:38AM -0500, Hal Finkel wrote:
> > > Tom (and Andy, Owen, Evan, Nadav),
> > > 
> > > I'd like the following commits placed into the 3.4.1 branch. I've
> > > attempted to sort this list by code owner:
> > > 
> > > Andrew Trick:
> > > r203719 - PR17473
> > > r203725 - This test need the X86 backend, move it to the X86 sub
> > > directory. [adjusts the test location from r203719]
> > > 
> > > r202273 - Fix PR18165: LSR must avoid scaling factors that exceed
> > > the limit on truncated use.
> > > 
> > > r201104 - [LPM] A terribly simple fix to a terribly complex bug:
> > > PR18773.
> > > 
> > > r198863 - Fixed old typo in ScalarEvolution, that caused wrong
> > > SCEVs zext operation.
> > > 
> > > Owen Anderson:
> > > r200201 - Fix for PR18102.
> > > r200202 - Additional fix for 200201: due to dependence on bitwidth
> > > test was moved to X86 directory.
> > > 
> > > r200705 - Expand vector bswap in LegalizeVectorOps
> > > 
> > 
> > Hi Hal,
> > 
> > I was able to merge all the fixes approved by Owen, except for
> > r200705.
> > The test case for that commit doesn't pass on the 3.4 branch.  I've
> > attached
> > the output from llc and FileCheck.  Could you send me an updated
> > patch
> > with a test case that work on 3.4?
> 
> Tom,
> 
> I've attached an updated patch for r200705 to apply against 3.4.
> 

I just committed this patch.

-Tom

> Thanks again,
> Hal
> 
> > 
> > Thanks,
> > Tom
> > 
> 
> -- 
> Hal Finkel
> Assistant Computational Scientist
> Leadership Computing Facility
> Argonne National Laboratory

> Index: test/CodeGen/X86/bswap-vector.ll
> ===================================================================
> --- test/CodeGen/X86/bswap-vector.ll	(revision 0)
> +++ test/CodeGen/X86/bswap-vector.ll	(revision 0)
> @@ -0,0 +1,19 @@
> +; RUN: llc < %s -mcpu=core | FileCheck %s
> +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
> +target triple = "x86_64-unknown-linux-gnu"
> +
> +declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)
> +
> +define <2 x i64> @foo(<2 x i64> %v) #0 {
> +entry:
> +  %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
> +  ret <2 x i64> %r
> +}
> +
> +; CHECK-LABEL: @foo
> +; CHECK: bswapq
> +; CHECK: bswapq
> +; CHECK: ret
> +
> +attributes #0 = { nounwind uwtable }
> +
> Index: lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp	(revision 205830)
> +++ lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp	(working copy)
> @@ -210,6 +210,7 @@
>    case ISD::SRL:
>    case ISD::ROTL:
>    case ISD::ROTR:
> +  case ISD::BSWAP:
>    case ISD::CTLZ:
>    case ISD::CTTZ:
>    case ISD::CTLZ_ZERO_UNDEF:




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