[llvm] r205836 - ARM64: scalarize v1i64 mul operation

[Tim Northover]

Author: tnorthover
Date: Wed Apr  9 02:07:02 2014
New Revision: 205836

URL: http://llvm.org/viewvc/llvm-project?rev=205836&view=rev
Log:
ARM64: scalarize v1i64 mul operation

This is the second part of fixing PR19367.

Modified:
    llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp
    llvm/trunk/test/CodeGen/ARM64/vmul.ll

Modified: llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp?rev=205836&r1=205835&r2=205836&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp Wed Apr  9 02:07:02 2014
@@ -173,6 +173,8 @@ ARM64TargetLowering::ARM64TargetLowering
   setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand);
   setOperationAction(ISD::FP_ROUND, MVT::v1f64, Expand);
 
+  setOperationAction(ISD::MUL, MVT::v1i64, Expand);
+
   // Custom lowering hooks are needed for XOR
   // to fold it into CSINC/CSINV.
   setOperationAction(ISD::XOR, MVT::i32, Custom);

Modified: llvm/trunk/test/CodeGen/ARM64/vmul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/vmul.ll?rev=205836&r1=205835&r2=205836&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/vmul.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/vmul.ll Wed Apr  9 02:07:02 2014
@@ -2027,3 +2027,10 @@ define <16 x i8> @test_pmull_high_64(<2
 }
 
 declare <16 x i8> @llvm.arm64.neon.pmull64(i64, i64)
+
+define <1 x i64> @test_mul_v1i64(<1 x i64> %lhs, <1 x i64> %rhs) nounwind {
+; CHECK-LABEL: test_mul_v1i64:
+; CHECK: mul
+  %prod = mul <1 x i64> %lhs, %rhs
+  ret <1 x i64> %prod
+}