[PATCH] R600: Make sign_extend_inreg legal.

[Matt Arsenault]

On 04/02/2014 03:28 PM, Jan Vesely wrote:
> Hi,
>
> On Tue, 2014-04-01 at 11:34 -0700, Matt Arsenault wrote:
>> I don't know why I didn't just do this before
>>
>> http://llvm-reviews.chandlerc.com/D3250
> I have two questions. I'm still learning llvm internals so pls bear with
> me.
>
>> +  if (!VT.isVector())
>> +    return SDValue();
> Is it possible to call the function on scalar types?
It's possible (and it was before), but now this might be unnecessary.

> I assume the default is Legal, and the patch only changes it to expand for i1, i8, i16.
The default is legal, but this does the opposite. It lets i1, i8, and 
i16 go back to the default

> Also given that the LowerSIGN_EXTEND_INREG, how is it different from using setOperationAction(Expand)?
> Is it kept around because of the EG TODO?
It's mostly kept around to scalarize it. IIRC the implementation for 
expand sign_extend_inreg for vectors wasn't doing what I wanted and 
creating a pair of vector shifts instead, although looking at what it 
does now I think it should work. I can try it again using the default 
expand.

>
> thank you,
> Jan
>
> PS: I apologize for not responding to that test request yet. These few weeks are rather busy for me.
>
>
>> Files:
>>    lib/Target/R600/AMDGPUISelLowering.cpp
>>    lib/Target/R600/EvergreenInstructions.td
>>    lib/Target/R600/SIISelLowering.cpp
>>    lib/Target/R600/SIInstructions.td
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