[PATCH] R600/SI: Use isProfitableToDupForIfCvt

Matt Arsenault Matthew.Arsenault at amd.com
Tue Mar 18 10:03:29 PDT 2014


On 03/18/2014 09:29 AM, Tom Stellard wrote:
> On Tue, Feb 11, 2014 at 05:46:06PM -0800, Matt Arsenault wrote:
>> It was only being used by R600
> What is the reason for moving the code into AMDGPUInstrInfo.* ?
>
> -Tom
It's still pretty much always beneficial to if convert on both, so it 
was weird for it to be implemented only for R600

>> http://llvm-reviews.chandlerc.com/D2748
>>
>> Files:
>>    lib/Target/R600/AMDGPUInstrInfo.cpp
>>    lib/Target/R600/AMDGPUInstrInfo.h
>>    lib/Target/R600/R600InstrInfo.cpp
>>    lib/Target/R600/R600InstrInfo.h
>>
>> Index: lib/Target/R600/AMDGPUInstrInfo.cpp
>> ===================================================================
>> --- lib/Target/R600/AMDGPUInstrInfo.cpp
>> +++ lib/Target/R600/AMDGPUInstrInfo.cpp
>> @@ -38,6 +38,31 @@
>>     return RI;
>>   }
>>   
>> +bool AMDGPUInstrInfo::isProfitableToIfCvt(MachineBasicBlock &,
>> +                                          unsigned, unsigned,
>> +                                          const BranchProbability &) const {
>> +  return true;
>> +}
>> +
>> +bool AMDGPUInstrInfo::isProfitableToIfCvt(MachineBasicBlock &,
>> +                                          unsigned, unsigned,
>> +                                          MachineBasicBlock &,
>> +                                          unsigned, unsigned,
>> +                                          const BranchProbability &) const {
>> +  return true;
>> +}
>> +
>> +bool AMDGPUInstrInfo::isProfitableToDupForIfCvt(
>> +  MachineBasicBlock &, unsigned,
>> +  const BranchProbability &) const {
>> +  return true;
>> +}
>> +
>> +bool AMDGPUInstrInfo::isProfitableToUnpredicate(MachineBasicBlock &,
>> +                                                MachineBasicBlock &) const {
>> +  return true;
>> +}
>> +
>>   bool AMDGPUInstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
>>                                              unsigned &SrcReg, unsigned &DstReg,
>>                                              unsigned &SubIdx) const {
>> Index: lib/Target/R600/AMDGPUInstrInfo.h
>> ===================================================================
>> --- lib/Target/R600/AMDGPUInstrInfo.h
>> +++ lib/Target/R600/AMDGPUInstrInfo.h
>> @@ -51,6 +51,27 @@
>>   
>>     virtual const AMDGPURegisterInfo &getRegisterInfo() const = 0;
>>   
>> +  virtual bool
>> +  isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
>> +                      unsigned ExtraPredCycles,
>> +                      const BranchProbability &Probability) const LLVM_OVERRIDE;
>> +
>> +  virtual bool isProfitableToIfCvt(
>> +    MachineBasicBlock &TMBB,
>> +    unsigned NumTCycles, unsigned ExtraTCycles,
>> +    MachineBasicBlock &FMBB,
>> +    unsigned NumFCycles, unsigned ExtraFCycles,
>> +    const BranchProbability &Probability) const LLVM_OVERRIDE;
>> +
>> +  virtual bool
>> +  isProfitableToDupForIfCvt(MachineBasicBlock &, unsigned,
>> +                            const BranchProbability &) const LLVM_OVERRIDE;
>> +
>> +  virtual bool
>> +  isProfitableToUnpredicate(MachineBasicBlock &,
>> +                            MachineBasicBlock &) const LLVM_OVERRIDE;
>> +
>> +
>>     bool isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg,
>>                                unsigned &DstReg, unsigned &SubIdx) const;
>>   
>> Index: lib/Target/R600/R600InstrInfo.cpp
>> ===================================================================
>> --- lib/Target/R600/R600InstrInfo.cpp
>> +++ lib/Target/R600/R600InstrInfo.cpp
>> @@ -934,41 +934,6 @@
>>     }
>>   }
>>   
>> -
>> -bool
>> -R600InstrInfo::isProfitableToIfCvt(MachineBasicBlock &MBB,
>> -                                   unsigned NumCyles,
>> -                                   unsigned ExtraPredCycles,
>> -                                   const BranchProbability &Probability) const{
>> -  return true;
>> -}
>> -
>> -bool
>> -R600InstrInfo::isProfitableToIfCvt(MachineBasicBlock &TMBB,
>> -                                   unsigned NumTCycles,
>> -                                   unsigned ExtraTCycles,
>> -                                   MachineBasicBlock &FMBB,
>> -                                   unsigned NumFCycles,
>> -                                   unsigned ExtraFCycles,
>> -                                   const BranchProbability &Probability) const {
>> -  return true;
>> -}
>> -
>> -bool
>> -R600InstrInfo::isProfitableToDupForIfCvt(MachineBasicBlock &MBB,
>> -                                         unsigned NumCyles,
>> -                                         const BranchProbability &Probability)
>> -                                         const {
>> -  return true;
>> -}
>> -
>> -bool
>> -R600InstrInfo::isProfitableToUnpredicate(MachineBasicBlock &TMBB,
>> -                                         MachineBasicBlock &FMBB) const {
>> -  return false;
>> -}
>> -
>> -
>>   bool
>>   R600InstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
>>     MachineOperand &MO = Cond[1];
>> Index: lib/Target/R600/R600InstrInfo.h
>> ===================================================================
>> --- lib/Target/R600/R600InstrInfo.h
>> +++ lib/Target/R600/R600InstrInfo.h
>> @@ -161,30 +161,12 @@
>>   
>>     bool isPredicable(MachineInstr *MI) const;
>>   
>> -  bool
>> -   isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCyles,
>> -                             const BranchProbability &Probability) const;
>> -
>> -  bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCyles,
>> -                           unsigned ExtraPredCycles,
>> -                           const BranchProbability &Probability) const ;
>> -
>> -  bool
>> -   isProfitableToIfCvt(MachineBasicBlock &TMBB,
>> -                       unsigned NumTCycles, unsigned ExtraTCycles,
>> -                       MachineBasicBlock &FMBB,
>> -                       unsigned NumFCycles, unsigned ExtraFCycles,
>> -                       const BranchProbability &Probability) const;
>> -
>>     bool DefinesPredicate(MachineInstr *MI,
>>                                     std::vector<MachineOperand> &Pred) const;
>>   
>>     bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
>>                            const SmallVectorImpl<MachineOperand> &Pred2) const;
>>   
>> -  bool isProfitableToUnpredicate(MachineBasicBlock &TMBB,
>> -                                          MachineBasicBlock &FMBB) const;
>> -
>>     bool PredicateInstruction(MachineInstr *MI,
>>                           const SmallVectorImpl<MachineOperand> &Pred) const;
>> Index: lib/Target/R600/AMDGPUInstrInfo.cpp
>> ===================================================================
>> --- lib/Target/R600/AMDGPUInstrInfo.cpp
>> +++ lib/Target/R600/AMDGPUInstrInfo.cpp
>> @@ -38,6 +38,31 @@
>>     return RI;
>>   }
>>   
>> +bool AMDGPUInstrInfo::isProfitableToIfCvt(MachineBasicBlock &,
>> +                                          unsigned, unsigned,
>> +                                          const BranchProbability &) const {
>> +  return true;
>> +}
>> +
>> +bool AMDGPUInstrInfo::isProfitableToIfCvt(MachineBasicBlock &,
>> +                                          unsigned, unsigned,
>> +                                          MachineBasicBlock &,
>> +                                          unsigned, unsigned,
>> +                                          const BranchProbability &) const {
>> +  return true;
>> +}
>> +
>> +bool AMDGPUInstrInfo::isProfitableToDupForIfCvt(
>> +  MachineBasicBlock &, unsigned,
>> +  const BranchProbability &) const {
>> +  return true;
>> +}
>> +
>> +bool AMDGPUInstrInfo::isProfitableToUnpredicate(MachineBasicBlock &,
>> +                                                MachineBasicBlock &) const {
>> +  return true;
>> +}
>> +
>>   bool AMDGPUInstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
>>                                              unsigned &SrcReg, unsigned &DstReg,
>>                                              unsigned &SubIdx) const {
>> Index: lib/Target/R600/AMDGPUInstrInfo.h
>> ===================================================================
>> --- lib/Target/R600/AMDGPUInstrInfo.h
>> +++ lib/Target/R600/AMDGPUInstrInfo.h
>> @@ -51,6 +51,27 @@
>>   
>>     virtual const AMDGPURegisterInfo &getRegisterInfo() const = 0;
>>   
>> +  virtual bool
>> +  isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
>> +                      unsigned ExtraPredCycles,
>> +                      const BranchProbability &Probability) const LLVM_OVERRIDE;
>> +
>> +  virtual bool isProfitableToIfCvt(
>> +    MachineBasicBlock &TMBB,
>> +    unsigned NumTCycles, unsigned ExtraTCycles,
>> +    MachineBasicBlock &FMBB,
>> +    unsigned NumFCycles, unsigned ExtraFCycles,
>> +    const BranchProbability &Probability) const LLVM_OVERRIDE;
>> +
>> +  virtual bool
>> +  isProfitableToDupForIfCvt(MachineBasicBlock &, unsigned,
>> +                            const BranchProbability &) const LLVM_OVERRIDE;
>> +
>> +  virtual bool
>> +  isProfitableToUnpredicate(MachineBasicBlock &,
>> +                            MachineBasicBlock &) const LLVM_OVERRIDE;
>> +
>> +
>>     bool isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg,
>>                                unsigned &DstReg, unsigned &SubIdx) const;
>>   
>> Index: lib/Target/R600/R600InstrInfo.cpp
>> ===================================================================
>> --- lib/Target/R600/R600InstrInfo.cpp
>> +++ lib/Target/R600/R600InstrInfo.cpp
>> @@ -934,41 +934,6 @@
>>     }
>>   }
>>   
>> -
>> -bool
>> -R600InstrInfo::isProfitableToIfCvt(MachineBasicBlock &MBB,
>> -                                   unsigned NumCyles,
>> -                                   unsigned ExtraPredCycles,
>> -                                   const BranchProbability &Probability) const{
>> -  return true;
>> -}
>> -
>> -bool
>> -R600InstrInfo::isProfitableToIfCvt(MachineBasicBlock &TMBB,
>> -                                   unsigned NumTCycles,
>> -                                   unsigned ExtraTCycles,
>> -                                   MachineBasicBlock &FMBB,
>> -                                   unsigned NumFCycles,
>> -                                   unsigned ExtraFCycles,
>> -                                   const BranchProbability &Probability) const {
>> -  return true;
>> -}
>> -
>> -bool
>> -R600InstrInfo::isProfitableToDupForIfCvt(MachineBasicBlock &MBB,
>> -                                         unsigned NumCyles,
>> -                                         const BranchProbability &Probability)
>> -                                         const {
>> -  return true;
>> -}
>> -
>> -bool
>> -R600InstrInfo::isProfitableToUnpredicate(MachineBasicBlock &TMBB,
>> -                                         MachineBasicBlock &FMBB) const {
>> -  return false;
>> -}
>> -
>> -
>>   bool
>>   R600InstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
>>     MachineOperand &MO = Cond[1];
>> Index: lib/Target/R600/R600InstrInfo.h
>> ===================================================================
>> --- lib/Target/R600/R600InstrInfo.h
>> +++ lib/Target/R600/R600InstrInfo.h
>> @@ -161,30 +161,12 @@
>>   
>>     bool isPredicable(MachineInstr *MI) const;
>>   
>> -  bool
>> -   isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCyles,
>> -                             const BranchProbability &Probability) const;
>> -
>> -  bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCyles,
>> -                           unsigned ExtraPredCycles,
>> -                           const BranchProbability &Probability) const ;
>> -
>> -  bool
>> -   isProfitableToIfCvt(MachineBasicBlock &TMBB,
>> -                       unsigned NumTCycles, unsigned ExtraTCycles,
>> -                       MachineBasicBlock &FMBB,
>> -                       unsigned NumFCycles, unsigned ExtraFCycles,
>> -                       const BranchProbability &Probability) const;
>> -
>>     bool DefinesPredicate(MachineInstr *MI,
>>                                     std::vector<MachineOperand> &Pred) const;
>>   
>>     bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
>>                            const SmallVectorImpl<MachineOperand> &Pred2) const;
>>   
>> -  bool isProfitableToUnpredicate(MachineBasicBlock &TMBB,
>> -                                          MachineBasicBlock &FMBB) const;
>> -
>>     bool PredicateInstruction(MachineInstr *MI,
>>                           const SmallVectorImpl<MachineOperand> &Pred) const;
>>   
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>





More information about the llvm-commits mailing list