[llvm] r204056 - R600/SI: Fix implementation of isInlineConstant() used by the verifier

Kevin Enderby enderby at apple.com
Mon Mar 17 12:33:25 PDT 2014


Hi Tom,

If I remember my IEEE-754 standard correctly, NaN’s are not signed.  So I suspect linux is wrong here.  But someone with more current knowledge could check that out as I did floating point software over 30 years ago :)

Kev

On Mar 17, 2014, at 12:18 PM, Stellard, Thomas <Tom.Stellard at amd.com> wrote:

> Hi Kevin,
> 
> I just saw your fix for this, I was about to do the same thing, so I've tested that change on my system and it works fine.  I'm not sure why we get -nan on linux and nan on darwin.
> 
> -Tom
> ________________________________________
> From: Kevin Enderby [enderby at apple.com]
> Sent: Monday, March 17, 2014 2:30 PM
> To: Stellard, Thomas
> Cc: Kevin Enderby; llvm-commits at cs.uiuc.edu
> Subject: Re: [llvm] r204056 - R600/SI: Fix implementation of isInlineConstant() used by the verifier
> 
> Hi Tom,
> 
> We are seeing a build bot failure with CodeGen/R600/v_cndmask.ll in http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-nobootstrap-RAincremental/builds/13587/steps/run.llvm.tests/logs/stdio
> 
> Could you please take a look?
> 
> The current build czar,
> Kev
> 
> 
> FAIL: LLVM :: CodeGen/R600/v_cndmask.ll (9845 of 17101)
> ******************** TEST 'LLVM :: CodeGen/R600/v_cndmask.ll' FAILED *************
> *******
> Script:
> --
> /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin11-nobootstrap-RAincremental/clang-build/Release+Asserts/bin/llc < /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin11-nobootstrap-RAincremental/llvm/test/CodeGen/R600/v_cndmask.ll -march=r600 -mcpu=SI -verify-machineinstrs | /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin11-nobootstrap-RAincremental/clang-build/Release+Asserts/bin/FileCheck --check-prefix=SI /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin11-nobootstrap-RAincremental/llvm/test/CodeGen/R600/v_cndmask.ll
> --
> Exit Code: 1
> 
> Command Output (stderr):
> --
> /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin11-nobootstrap-RAincremental/llvm/test/CodeGen/R600/v_cndmask.ll:6:11: error: expected string not found in input
> ; SI-DAG: -nan
>          ^
> <stdin>:16:24: note: scanning from here
> V_CNDMASK_B32_e64 v0, v0, nan, s[2:3], 0, 0, 0, 0
>                       ^
> <stdin>:16:28: note: possible intended match here
> V_CNDMASK_B32_e64 v0, v0, nan, s[2:3], 0, 0, 0, 0
>                           ^
> 
> --
> On Mar 17, 2014, at 10:03 AM, Tom Stellard <thomas.stellard at amd.com> wrote:
> 
>> Author: tstellar
>> Date: Mon Mar 17 12:03:52 2014
>> New Revision: 204056
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=204056&view=rev
>> Log:
>> R600/SI: Fix implementation of isInlineConstant() used by the verifier
>> 
>> The type of the immediates should not matter as long as the encoding is
>> equivalent to the encoding of one of the legal inline constants.
>> 
>> Tested-by: Michel Dänzer <michel.daenzer at amd.com>
>> 
>> Added:
>>   llvm/trunk/test/CodeGen/R600/v_cndmask.ll
>> Modified:
>>   llvm/trunk/lib/Target/R600/SIInstrInfo.cpp
>> 
>> Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.cpp?rev=204056&r1=204055&r2=204056&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/R600/SIInstrInfo.cpp (original)
>> +++ llvm/trunk/lib/Target/R600/SIInstrInfo.cpp Mon Mar 17 12:03:52 2014
>> @@ -349,21 +349,32 @@ bool SIInstrInfo::isSALUInstr(const Mach
>> }
>> 
>> bool SIInstrInfo::isInlineConstant(const MachineOperand &MO) const {
>> -  if(MO.isImm()) {
>> -    return MO.getImm() >= -16 && MO.getImm() <= 64;
>> -  }
>> -  if (MO.isFPImm()) {
>> -    return MO.getFPImm()->isExactlyValue(0.0)  ||
>> -           MO.getFPImm()->isExactlyValue(0.5)  ||
>> -           MO.getFPImm()->isExactlyValue(-0.5) ||
>> -           MO.getFPImm()->isExactlyValue(1.0)  ||
>> -           MO.getFPImm()->isExactlyValue(-1.0) ||
>> -           MO.getFPImm()->isExactlyValue(2.0)  ||
>> -           MO.getFPImm()->isExactlyValue(-2.0) ||
>> -           MO.getFPImm()->isExactlyValue(4.0)  ||
>> -           MO.getFPImm()->isExactlyValue(-4.0);
>> +
>> +  union {
>> +    int32_t I;
>> +    float F;
>> +  } Imm;
>> +
>> +  if (MO.isImm()) {
>> +    Imm.I = MO.getImm();
>> +  } else if (MO.isFPImm()) {
>> +    Imm.F = MO.getFPImm()->getValueAPF().convertToFloat();
>> +  } else {
>> +    return false;
>>  }
>> -  return false;
>> +
>> +  // The actual type of the operand does not seem to matter as long
>> +  // as the bits match one of the inline immediate values.  For example:
>> +  //
>> +  // -nan has the hexadecimal encoding of 0xfffffffe which is -2 in decimal,
>> +  // so it is a legal inline immediate.
>> +  //
>> +  // 1065353216 has the hexadecimal encoding 0x3f800000 which is 1.0f in
>> +  // floating-point, so it is a legal inline immediate.
>> +  return (Imm.I >= -16 && Imm.I <= 64) ||
>> +          Imm.F == 0.0f || Imm.F == 0.5f || Imm.F == -0.5f || Imm.F == 1.0f ||
>> +          Imm.F == -1.0f || Imm.F == 2.0f || Imm.F == -2.0f || Imm.F == 4.0f ||
>> +          Imm.F == -4.0f;
>> }
>> 
>> bool SIInstrInfo::isLiteralConstant(const MachineOperand &MO) const {
>> 
>> Added: llvm/trunk/test/CodeGen/R600/v_cndmask.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/v_cndmask.ll?rev=204056&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/R600/v_cndmask.ll (added)
>> +++ llvm/trunk/test/CodeGen/R600/v_cndmask.ll Mon Mar 17 12:03:52 2014
>> @@ -0,0 +1,13 @@
>> +; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI %s
>> +
>> +; SI: @v_cnd_nan
>> +; SI: V_CNDMASK_B32_e64 v{{[0-9]}},
>> +; SI-DAG: v{{[0-9]}}
>> +; SI-DAG: -nan
>> +define void @v_cnd_nan(float addrspace(1)* %out, i32 %c, float %f) {
>> +entry:
>> +  %0 = icmp ne i32 %c, 0
>> +  %1 = select i1 %0, float 0xFFFFFFFFE0000000, float %f
>> +  store float %1, float addrspace(1)* %out
>> +  ret void
>> +}
>> 
>> 
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> 
> 
> 





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