[llvm] r204066 - Add iterator range definitions for the MachineRegisterInfo iterators.
Owen Anderson
resistor at mac.com
Mon Mar 17 11:01:41 PDT 2014
Author: resistor
Date: Mon Mar 17 13:01:41 2014
New Revision: 204066
URL: http://llvm.org/viewvc/llvm-project?rev=204066&view=rev
Log:
Add iterator range definitions for the MachineRegisterInfo iterators.
Modified:
llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=204066&r1=204065&r2=204066&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Mon Mar 17 13:01:41 2014
@@ -16,6 +16,7 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/IndexedMap.h"
+#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
@@ -224,6 +225,10 @@ public:
}
static reg_iterator reg_end() { return reg_iterator(0); }
+ inline iterator_range<reg_iterator> reg_operands(unsigned Reg) {
+ return iterator_range<reg_iterator>(reg_begin(Reg), reg_end());
+ }
+
/// reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses
/// of the specified register, stepping by MachineInstr.
typedef defusechain_instr_iterator<true,true,false,false,true,false>
@@ -233,6 +238,11 @@ public:
}
static reg_instr_iterator reg_instr_end() { return reg_instr_iterator(0); }
+ inline iterator_range<reg_instr_iterator> reg_instructions(unsigned Reg) {
+ return iterator_range<reg_instr_iterator>(reg_instr_begin(Reg),
+ reg_instr_end());
+ }
+
/// reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses
/// of the specified register, stepping by bundle.
typedef defusechain_instr_iterator<true,true,false,false,false,true>
@@ -242,6 +252,11 @@ public:
}
static reg_bundle_iterator reg_bundle_end() { return reg_bundle_iterator(0); }
+ inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) {
+ return iterator_range<reg_bundle_iterator>(reg_bundle_begin(Reg),
+ reg_bundle_end());
+ }
+
/// reg_empty - Return true if there are no instructions using or defining the
/// specified register (it may be live-in).
bool reg_empty(unsigned RegNo) const { return reg_begin(RegNo) == reg_end(); }
@@ -255,6 +270,11 @@ public:
}
static reg_nodbg_iterator reg_nodbg_end() { return reg_nodbg_iterator(0); }
+ inline iterator_range<reg_nodbg_iterator> reg_nodbg_operands(unsigned Reg) {
+ return iterator_range<reg_nodbg_iterator>(reg_nodbg_begin(Reg),
+ reg_nodbg_end());
+ }
+
/// reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk
/// all defs and uses of the specified register, stepping by MachineInstr,
/// skipping those marked as Debug.
@@ -267,6 +287,12 @@ public:
return reg_instr_nodbg_iterator(0);
}
+ inline iterator_range<reg_instr_nodbg_iterator>
+ reg_nodbg_instructions(unsigned Reg) {
+ return iterator_range<reg_instr_nodbg_iterator>(reg_instr_nodbg_begin(Reg),
+ reg_instr_nodbg_end());
+ }
+
/// reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk
/// all defs and uses of the specified register, stepping by bundle,
/// skipping those marked as Debug.
@@ -279,6 +305,12 @@ public:
return reg_bundle_nodbg_iterator(0);
}
+ inline iterator_range<reg_bundle_nodbg_iterator>
+ reg_nodbg_bundles(unsigned Reg) {
+ return iterator_range<reg_bundle_nodbg_iterator>(reg_bundle_nodbg_begin(Reg),
+ reg_bundle_nodbg_end());
+ }
+
/// reg_nodbg_empty - Return true if the only instructions using or defining
/// Reg are Debug instructions.
bool reg_nodbg_empty(unsigned RegNo) const {
@@ -293,6 +325,10 @@ public:
}
static def_iterator def_end() { return def_iterator(0); }
+ inline iterator_range<def_iterator> def_operands(unsigned Reg) {
+ return iterator_range<def_iterator>(def_begin(Reg), def_end());
+ }
+
/// def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the
/// specified register, stepping by MachineInst.
typedef defusechain_instr_iterator<false,true,false,false,true,false>
@@ -302,6 +338,11 @@ public:
}
static def_instr_iterator def_instr_end() { return def_instr_iterator(0); }
+ inline iterator_range<def_instr_iterator> def_instructions(unsigned Reg) {
+ return iterator_range<def_instr_iterator>(def_instr_begin(Reg),
+ def_instr_end());
+ }
+
/// def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the
/// specified register, stepping by bundle.
typedef defusechain_instr_iterator<false,true,false,false,false,true>
@@ -311,6 +352,11 @@ public:
}
static def_bundle_iterator def_bundle_end() { return def_bundle_iterator(0); }
+ inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) {
+ return iterator_range<def_bundle_iterator>(def_bundle_begin(Reg),
+ def_bundle_end());
+ }
+
/// def_empty - Return true if there are no instructions defining the
/// specified register (it may be live-in).
bool def_empty(unsigned RegNo) const { return def_begin(RegNo) == def_end(); }
@@ -332,6 +378,10 @@ public:
}
static use_iterator use_end() { return use_iterator(0); }
+ inline iterator_range<use_iterator> use_operands(unsigned Reg) {
+ return iterator_range<use_iterator>(use_begin(Reg), use_end());
+ }
+
/// use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the
/// specified register, stepping by MachineInstr.
typedef defusechain_instr_iterator<true,false,false,false,true,false>
@@ -341,6 +391,11 @@ public:
}
static use_instr_iterator use_instr_end() { return use_instr_iterator(0); }
+ inline iterator_range<use_instr_iterator> use_instructions(unsigned Reg) {
+ return iterator_range<use_instr_iterator>(use_instr_begin(Reg),
+ use_instr_end());
+ }
+
/// use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the
/// specified register, stepping by bundle.
typedef defusechain_instr_iterator<true,false,false,false,false,true>
@@ -350,6 +405,11 @@ public:
}
static use_bundle_iterator use_bundle_end() { return use_bundle_iterator(0); }
+ inline iterator_range<use_bundle_iterator> use_bundles(unsigned Reg) {
+ return iterator_range<use_bundle_iterator>(use_bundle_begin(Reg),
+ use_bundle_end());
+ }
+
/// use_empty - Return true if there are no instructions using the specified
/// register.
bool use_empty(unsigned RegNo) const { return use_begin(RegNo) == use_end(); }
@@ -372,6 +432,11 @@ public:
}
static use_nodbg_iterator use_nodbg_end() { return use_nodbg_iterator(0); }
+ inline iterator_range<use_nodbg_iterator> use_nodbg_operands(unsigned Reg) {
+ return iterator_range<use_nodbg_iterator>(use_nodbg_begin(Reg),
+ use_nodbg_end());
+ }
+
/// use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk
/// all uses of the specified register, stepping by MachineInstr, skipping
/// those marked as Debug.
@@ -384,6 +449,12 @@ public:
return use_instr_nodbg_iterator(0);
}
+ inline iterator_range<use_instr_nodbg_iterator>
+ use_nodbg_instructions(unsigned Reg) {
+ return iterator_range<use_instr_nodbg_iterator>(use_instr_nodbg_begin(Reg),
+ use_instr_nodbg_end());
+ }
+
/// use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk
/// all uses of the specified register, stepping by bundle, skipping
/// those marked as Debug.
@@ -396,6 +467,12 @@ public:
return use_bundle_nodbg_iterator(0);
}
+ inline iterator_range<use_bundle_nodbg_iterator>
+ use_nodbg_bundles(unsigned Reg) {
+ return iterator_range<use_bundle_nodbg_iterator>(use_bundle_nodbg_begin(Reg),
+ use_bundle_nodbg_end());
+ }
+
/// use_nodbg_empty - Return true if there are no non-Debug instructions
/// using the specified register.
bool use_nodbg_empty(unsigned RegNo) const {
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