[llvm] r203695 - R600: Fix trunc store from i64 to i1

[Matt Arsenault]

Author: arsenm
Date: Wed Mar 12 13:45:52 2014
New Revision: 203695

URL: http://llvm.org/viewvc/llvm-project?rev=203695&view=rev
Log:
R600: Fix trunc store from i64 to i1

Added:
    llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll
Modified:
    llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp

Modified: llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=203695&r1=203694&r2=203695&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp Wed Mar 12 13:45:52 2014
@@ -98,10 +98,16 @@ AMDGPUTargetLowering::AMDGPUTargetLoweri
   setTruncStoreAction(MVT::v2i32, MVT::v2i16, Custom);
   setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom);
   setTruncStoreAction(MVT::v4i32, MVT::v4i8, Custom);
+
   // XXX: This can be change to Custom, once ExpandVectorStores can
   // handle 64-bit stores.
   setTruncStoreAction(MVT::v4i32, MVT::v4i16, Expand);
 
+  setTruncStoreAction(MVT::i64, MVT::i1, Expand);
+  setTruncStoreAction(MVT::v2i64, MVT::v2i1, Expand);
+  setTruncStoreAction(MVT::v4i64, MVT::v4i1, Expand);
+
+
   setOperationAction(ISD::LOAD, MVT::f32, Promote);
   AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32);
 

Added: llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll?rev=203695&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll (added)
+++ llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll Wed Mar 12 13:45:52 2014
@@ -0,0 +1,30 @@
+; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
+
+
+; SI-LABEL: @global_truncstore_i32_to_i1
+; SI: S_LOAD_DWORD [[LOAD:s[0-9]+]],
+; SI: V_AND_B32_e64 [[VREG:v[0-9]+]], 1, [[LOAD]], 0, 0, 0, 0
+; SI: BUFFER_STORE_BYTE [[VREG]],
+define void @global_truncstore_i32_to_i1(i1 addrspace(1)* %out, i32 %val) nounwind {
+  %trunc = trunc i32 %val to i1
+  store i1 %trunc, i1 addrspace(1)* %out, align 1
+  ret void
+}
+
+; SI-LABEL: @global_truncstore_i64_to_i1
+; SI: BUFFER_STORE_BYTE
+define void @global_truncstore_i64_to_i1(i1 addrspace(1)* %out, i64 %val) nounwind {
+  %trunc = trunc i64 %val to i1
+  store i1 %trunc, i1 addrspace(1)* %out, align 1
+  ret void
+}
+
+; SI-LABEL: @global_truncstore_i16_to_i1
+; SI: S_LOAD_DWORD [[LOAD:s[0-9]+]],
+; SI: V_AND_B32_e64 [[VREG:v[0-9]+]], 1, [[LOAD]], 0, 0, 0, 0
+; SI: BUFFER_STORE_BYTE [[VREG]],
+define void @global_truncstore_i16_to_i1(i1 addrspace(1)* %out, i16 %val) nounwind {
+  %trunc = trunc i16 %val to i1
+  store i1 %trunc, i1 addrspace(1)* %out, align 1
+  ret void
+}