[PATCH] AARCH64_BE load/store rules fix for ARM ABI

Tim Northover t.p.northover at gmail.com
Fri Mar 7 00:31:10 PST 2014

  Hi Jiangning,

  I'm afraid I still can't quite see what you're proposing. First, are you sure you mean "alignment" in your post? If so, you seem to be advocating treating these two instructions differently:

       %val = load <4 x i16>* %addr, align 8 ; gets ldr
       %val = load <4 x i16>* %addr, align 2 ; gets ld1

  My opinion is that would be madness, and almost impossible to produce a consistent code from. I'll try to think up some examples if you like, but just want to make sure I understand what you're saying first.

  If that's not what you mean, could you give some IR examples and the code you'd like them to generate (particularly showing the distinctions)?




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