[llvm] r202393 - [XCore] Provide information about known zero bits of resource instructions.
Richard Osborne
richard at xmos.com
Thu Feb 27 05:20:07 PST 2014
Author: friedgold
Date: Thu Feb 27 07:20:06 2014
New Revision: 202393
URL: http://llvm.org/viewvc/llvm-project?rev=202393&view=rev
Log:
[XCore] Provide information about known zero bits of resource instructions.
Added:
llvm/trunk/test/CodeGen/XCore/resources_combine.ll
Modified:
llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=202393&r1=202392&r2=202393&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Thu Feb 27 07:20:06 2014
@@ -1770,6 +1770,34 @@ void XCoreTargetLowering::computeMaskedB
KnownZero.getBitWidth() - 1);
}
break;
+ case ISD::INTRINSIC_W_CHAIN:
+ {
+ unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
+ switch (IntNo) {
+ case Intrinsic::xcore_getts:
+ // High bits are known to be zero.
+ KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(),
+ KnownZero.getBitWidth() - 16);
+ break;
+ case Intrinsic::xcore_int:
+ case Intrinsic::xcore_inct:
+ // High bits are known to be zero.
+ KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(),
+ KnownZero.getBitWidth() - 8);
+ break;
+ case Intrinsic::xcore_testct:
+ // Result is either 0 or 1.
+ KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(),
+ KnownZero.getBitWidth() - 1);
+ break;
+ case Intrinsic::xcore_testwct:
+ // Result is in the range 0 - 4.
+ KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(),
+ KnownZero.getBitWidth() - 3);
+ break;
+ }
+ }
+ break;
}
}
Added: llvm/trunk/test/CodeGen/XCore/resources_combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/resources_combine.ll?rev=202393&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/resources_combine.ll (added)
+++ llvm/trunk/test/CodeGen/XCore/resources_combine.ll Thu Feb 27 07:20:06 2014
@@ -0,0 +1,52 @@
+; RUN: llc -march=xcore < %s | FileCheck %s
+
+declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
+declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
+declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
+declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
+declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
+
+define i32 @int(i8 addrspace(1)* %r) nounwind {
+; CHECK-LABEL: int:
+; CHECK: int r0, res[r0]
+; CHECK-NEXT: retsp 0
+ %result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
+ %trunc = and i32 %result, 255
+ ret i32 %trunc
+}
+
+define i32 @inct(i8 addrspace(1)* %r) nounwind {
+; CHECK-LABEL: inct:
+; CHECK: inct r0, res[r0]
+; CHECK-NEXT: retsp 0
+ %result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
+ %trunc = and i32 %result, 255
+ ret i32 %trunc
+}
+
+define i32 @testct(i8 addrspace(1)* %r) nounwind {
+; CHECK-LABEL: testct:
+; CHECK: testct r0, res[r0]
+; CHECK-NEXT: retsp 0
+ %result = call i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
+ %trunc = and i32 %result, 1
+ ret i32 %trunc
+}
+
+define i32 @testwct(i8 addrspace(1)* %r) nounwind {
+; CHECK-LABEL: testwct:
+; CHECK: testwct r0, res[r0]
+; CHECK-NEXT: retsp 0
+ %result = call i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
+ %trunc = and i32 %result, 7
+ ret i32 %trunc
+}
+
+define i32 @getts(i8 addrspace(1)* %r) nounwind {
+; CHECK-LABEL: getts:
+; CHECK: getts r0, res[r0]
+; CHECK-NEXT: retsp 0
+ %result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
+ %trunc = and i32 %result, 65535
+ ret i32 %result
+}
More information about the llvm-commits
mailing list