[llvm] r201546 - AVX-512: Fixed size of mask registers

[Elena Demikhovsky]

Author: delena
Date: Tue Feb 18 01:52:26 2014
New Revision: 201546

URL: http://llvm.org/viewvc/llvm-project?rev=201546&view=rev
Log:
AVX-512: Fixed size of mask registers

Modified:
    llvm/trunk/lib/Target/X86/X86RegisterInfo.td

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=201546&r1=201545&r2=201546&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Tue Feb 18 01:52:26 2014
@@ -463,11 +463,13 @@ def VR128X : RegisterClass<"X86", [v16i8
 def VR256X : RegisterClass<"X86", [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
                           256, (sequence "YMM%u", 0, 31)>;
 
-def VK1     : RegisterClass<"X86", [i1],     1, (sequence "K%u", 0, 7)>;
-def VK8     : RegisterClass<"X86", [v8i1],   8, (sequence "K%u", 0, 7)>;
+// The size of the all masked registers is 16 bit because we have only one
+// KMOVW istruction that can store this register in memory, and it writes 2 bytes
+def VK1     : RegisterClass<"X86", [i1],    16, (sequence "K%u", 0, 7)>;
+def VK8     : RegisterClass<"X86", [v8i1],  16, (sequence "K%u", 0, 7)>;
 def VK16    : RegisterClass<"X86", [v16i1], 16, (add VK8)>;
 
-def VK1WM   : RegisterClass<"X86", [i1],     1, (sub VK1, K0)>;
-def VK8WM   : RegisterClass<"X86", [v8i1],   8, (sub VK8, K0)>;
+def VK1WM   : RegisterClass<"X86", [i1],    16, (sub VK1, K0)>;
+def VK8WM   : RegisterClass<"X86", [v8i1],  16, (sub VK8, K0)>;
 def VK16WM  : RegisterClass<"X86", [v16i1], 16, (add VK8WM)>;