[PATCH] R600/SI: Fix fneg for 0.0

[Tom Stellard]

On Wed, Jan 29, 2014 at 06:23:00PM +0900, Michel Dänzer wrote:
> From: Michel Dänzer <michel.daenzer at amd.com>
> 
> V_ADD_F32 with source modifier does not produce -0.0 for this. Just
> manipulate the sign bit directly instead.
> 

That's strange, so does this mean we can never use these modifiers?

> Also add a pattern for (fneg (fabs ...)).
> 
> Fixes a bunch of bit encoding piglit tests with radeonsi.
> 
> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
> ---
>  lib/Target/R600/SIInstructions.td | 11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
> index 912b59a..43fe63c 100644
> --- a/lib/Target/R600/SIInstructions.td
> +++ b/lib/Target/R600/SIInstructions.td
> @@ -1684,15 +1684,18 @@ def : Pat <
>  >;
>  
>  def : Pat <
> +  (fneg (fabs f32:$src)),
> +  (V_OR_B32_e32 $src, (V_MOV_B32_e32 0x80000000)) /* Set sign bit */
> +>;
> +
> +def : Pat <
>    (fabs f32:$src),
> -  (V_ADD_F32_e64 $src, (i32 0 /* SRC1 */),
> -   1 /* ABS */, 0 /* CLAMP */, 0 /* OMOD */, 0 /* NEG */)
> +  (V_AND_B32_e32 $src, (V_MOV_B32_e32 0x7fffffff)) /* Clear sign bit */
>  >;
>  
>  def : Pat <
>    (fneg f32:$src),
> -  (V_ADD_F32_e64 $src, (i32 0 /* SRC1 */),
> -   0 /* ABS */, 0 /* CLAMP */, 0 /* OMOD */, 1 /* NEG */)
> +  (V_XOR_B32_e32 $src, (V_MOV_B32_e32 0x80000000)) /* Toggle sign bit */
>  >;

I think you may be able to achieve the same results by marking
ISD::FNEG and ISD::FABS as Expand in SIISelLowering.  Also, we
have implemented isFAbsFree() and isFNegFree() in AMDGPUISelLowering.cpp
We will need to move these implementations into R600ISelLowering.cpp
now that FAbs and FNeg are no longer free on SI.

-Tom

>  
>  /********** ================== **********/
> -- 
> 1.8.5.3
> 
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