[llvm] r200431 - PGO branch weight: update edge weights in SelectionDAGBuilder.

Rafael EspĂ­ndola rafael.espindola at gmail.com
Wed Jan 29 16:56:34 PST 2014


Looks like this broke test/CodeGen/ARM/lsr-unfolded-offset.ll.

On 29 January 2014 19:24, Manman Ren <manman.ren at gmail.com> wrote:
> Author: mren
> Date: Wed Jan 29 18:24:37 2014
> New Revision: 200431
>
> URL: http://llvm.org/viewvc/llvm-project?rev=200431&view=rev
> Log:
> PGO branch weight: update edge weights in SelectionDAGBuilder.
>
> When converting from "or + br" to two branches, or converting from
> "and + br" to two branches, we correctly update the edge weights of
> the two branches.
>
> Added:
>     llvm/trunk/test/CodeGen/X86/MachineBranchProb.ll
> Modified:
>     llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>     llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=200431&r1=200430&r2=200431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Jan 29 18:24:37 2014
> @@ -1393,7 +1393,9 @@ SelectionDAGBuilder::EmitBranchForMerged
>                                                    MachineBasicBlock *TBB,
>                                                    MachineBasicBlock *FBB,
>                                                    MachineBasicBlock *CurBB,
> -                                                  MachineBasicBlock *SwitchBB) {
> +                                                  MachineBasicBlock *SwitchBB,
> +                                                  uint32_t TWeight,
> +                                                  uint32_t FWeight) {
>    const BasicBlock *BB = CurBB->getBasicBlock();
>
>    // If the leaf of the tree is a comparison, merge the condition into
> @@ -1418,7 +1420,7 @@ SelectionDAGBuilder::EmitBranchForMerged
>        }
>
>        CaseBlock CB(Condition, BOp->getOperand(0),
> -                   BOp->getOperand(1), NULL, TBB, FBB, CurBB);
> +                   BOp->getOperand(1), NULL, TBB, FBB, CurBB, TWeight, FWeight);
>        SwitchCases.push_back(CB);
>        return;
>      }
> @@ -1426,17 +1428,26 @@ SelectionDAGBuilder::EmitBranchForMerged
>
>    // Create a CaseBlock record representing this branch.
>    CaseBlock CB(ISD::SETEQ, Cond, ConstantInt::getTrue(*DAG.getContext()),
> -               NULL, TBB, FBB, CurBB);
> +               NULL, TBB, FBB, CurBB, TWeight, FWeight);
>    SwitchCases.push_back(CB);
>  }
>
> +/// Scale down both weights to fit into uint32_t.
> +static void ScaleWeights(uint64_t &NewTrue, uint64_t &NewFalse) {
> +  uint64_t NewMax = (NewTrue > NewFalse) ? NewTrue : NewFalse;
> +  uint32_t Scale = (NewMax / UINT32_MAX) + 1;
> +  NewTrue = NewTrue / Scale;
> +  NewFalse = NewFalse / Scale;
> +}
> +
>  /// FindMergedConditions - If Cond is an expression like
>  void SelectionDAGBuilder::FindMergedConditions(const Value *Cond,
>                                                 MachineBasicBlock *TBB,
>                                                 MachineBasicBlock *FBB,
>                                                 MachineBasicBlock *CurBB,
>                                                 MachineBasicBlock *SwitchBB,
> -                                               unsigned Opc) {
> +                                               unsigned Opc, uint32_t TWeight,
> +                                               uint32_t FWeight) {
>    // If this node is not part of the or/and tree, emit it as a branch.
>    const Instruction *BOp = dyn_cast<Instruction>(Cond);
>    if (!BOp || !(isa<BinaryOperator>(BOp) || isa<CmpInst>(BOp)) ||
> @@ -1444,7 +1455,8 @@ void SelectionDAGBuilder::FindMergedCond
>        BOp->getParent() != CurBB->getBasicBlock() ||
>        !InBlock(BOp->getOperand(0), CurBB->getBasicBlock()) ||
>        !InBlock(BOp->getOperand(1), CurBB->getBasicBlock())) {
> -    EmitBranchForMergedCondition(Cond, TBB, FBB, CurBB, SwitchBB);
> +    EmitBranchForMergedCondition(Cond, TBB, FBB, CurBB, SwitchBB,
> +                                 TWeight, FWeight);
>      return;
>    }
>
> @@ -1456,6 +1468,7 @@ void SelectionDAGBuilder::FindMergedCond
>
>    if (Opc == Instruction::Or) {
>      // Codegen X | Y as:
> +    // BB1:
>      //   jmp_if_X TBB
>      //   jmp TmpBB
>      // TmpBB:
> @@ -1463,14 +1476,34 @@ void SelectionDAGBuilder::FindMergedCond
>      //   jmp FBB
>      //
>
> +    // We have flexibility in setting Prob for BB1 and Prob for TmpBB.
> +    // The requirement is that
> +    //   TrueProb for BB1 + (FalseProb for BB1 * TrueProb for TmpBB)
> +    //     = TrueProb for orignal BB.
> +    // Assuming the orignal weights are A and B, one choice is to set BB1's
> +    // weights to A and A+2B, and set TmpBB's weights to A and 2B. This choice
> +    // assumes that
> +    //   TrueProb for BB1 == FalseProb for BB1 * TrueProb for TmpBB.
> +    // Another choice is to assume TrueProb for BB1 equals to TrueProb for
> +    // TmpBB, but the math is more complicated.
> +
> +    uint64_t NewTrueWeight = TWeight;
> +    uint64_t NewFalseWeight = (uint64_t)TWeight + 2 * (uint64_t)FWeight;
> +    ScaleWeights(NewTrueWeight, NewFalseWeight);
>      // Emit the LHS condition.
> -    FindMergedConditions(BOp->getOperand(0), TBB, TmpBB, CurBB, SwitchBB, Opc);
> +    FindMergedConditions(BOp->getOperand(0), TBB, TmpBB, CurBB, SwitchBB, Opc,
> +                         NewTrueWeight, NewFalseWeight);
>
> +    NewTrueWeight = TWeight;
> +    NewFalseWeight = 2 * (uint64_t)FWeight;
> +    ScaleWeights(NewTrueWeight, NewFalseWeight);
>      // Emit the RHS condition into TmpBB.
> -    FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc);
> +    FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc,
> +                         NewTrueWeight, NewFalseWeight);
>    } else {
>      assert(Opc == Instruction::And && "Unknown merge op!");
>      // Codegen X & Y as:
> +    // BB1:
>      //   jmp_if_X TmpBB
>      //   jmp FBB
>      // TmpBB:
> @@ -1479,11 +1512,28 @@ void SelectionDAGBuilder::FindMergedCond
>      //
>      //  This requires creation of TmpBB after CurBB.
>
> +    // We have flexibility in setting Prob for BB1 and Prob for TmpBB.
> +    // The requirement is that
> +    //   FalseProb for BB1 + (TrueProb for BB1 * FalseProb for TmpBB)
> +    //     = FalseProb for orignal BB.
> +    // Assuming the orignal weights are A and B, one choice is to set BB1's
> +    // weights to 2A+B and B, and set TmpBB's weights to 2A and B. This choice
> +    // assumes that
> +    //   FalseProb for BB1 == TrueProb for BB1 * FalseProb for TmpBB.
> +
> +    uint64_t NewTrueWeight = 2 * (uint64_t)TWeight + (uint64_t)FWeight;
> +    uint64_t NewFalseWeight = FWeight;
> +    ScaleWeights(NewTrueWeight, NewFalseWeight);
>      // Emit the LHS condition.
> -    FindMergedConditions(BOp->getOperand(0), TmpBB, FBB, CurBB, SwitchBB, Opc);
> +    FindMergedConditions(BOp->getOperand(0), TmpBB, FBB, CurBB, SwitchBB, Opc,
> +                         NewTrueWeight, NewFalseWeight);
>
> +    NewTrueWeight = 2 * (uint64_t)TWeight;
> +    NewFalseWeight = FWeight;
> +    ScaleWeights(NewTrueWeight, NewFalseWeight);
>      // Emit the RHS condition into TmpBB.
> -    FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc);
> +    FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc,
> +                         NewTrueWeight, NewFalseWeight);
>    }
>  }
>
> @@ -1570,7 +1620,8 @@ void SelectionDAGBuilder::visitBr(const
>          (BOp->getOpcode() == Instruction::And ||
>           BOp->getOpcode() == Instruction::Or)) {
>        FindMergedConditions(BOp, Succ0MBB, Succ1MBB, BrMBB, BrMBB,
> -                           BOp->getOpcode());
> +                           BOp->getOpcode(), getEdgeWeight(BrMBB, Succ0MBB),
> +                           getEdgeWeight(BrMBB, Succ1MBB));
>        // If the compares in later blocks need to use values not currently
>        // exported from this block, export them now.  This block should always
>        // be the first entry.
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=200431&r1=200430&r2=200431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Wed Jan 29 18:24:37 2014
> @@ -612,11 +612,13 @@ public:
>
>    void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB,
>                              MachineBasicBlock *FBB, MachineBasicBlock *CurBB,
> -                            MachineBasicBlock *SwitchBB, unsigned Opc);
> +                            MachineBasicBlock *SwitchBB, unsigned Opc,
> +                            uint32_t TW, uint32_t FW);
>    void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB,
>                                      MachineBasicBlock *FBB,
>                                      MachineBasicBlock *CurBB,
> -                                    MachineBasicBlock *SwitchBB);
> +                                    MachineBasicBlock *SwitchBB,
> +                                    uint32_t TW, uint32_t FW);
>    bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases);
>    bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB);
>    void CopyToExportRegsIfNeeded(const Value *V);
>
> Added: llvm/trunk/test/CodeGen/X86/MachineBranchProb.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/MachineBranchProb.ll?rev=200431&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/MachineBranchProb.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/MachineBranchProb.ll Wed Jan 29 18:24:37 2014
> @@ -0,0 +1,34 @@
> +; RUN: llc < %s -mtriple=x86_64-apple-darwin -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s
> +
> +;; Make sure a transformation in SelectionDAGBuilder that converts "or + br" to
> +;; two branches correctly updates the branch probability.
> +
> + at max_regno = common global i32 0, align 4
> +
> +define void @test(i32* %old, i32 %final) {
> +for.cond:
> +  br label %for.cond2
> +
> +for.cond2:                                        ; preds = %for.inc, %for.cond
> +  %i.1 = phi i32 [ %inc19, %for.inc ], [ 0, %for.cond ]
> +  %bit.0 = phi i32 [ %shl, %for.inc ], [ 1, %for.cond ]
> +  %tobool = icmp eq i32 %bit.0, 0
> +  %v3 = load i32* @max_regno, align 4
> +  %cmp4 = icmp eq i32 %i.1, %v3
> +  %or.cond = or i1 %tobool, %cmp4
> +  br i1 %or.cond, label %for.inc20, label %for.inc, !prof !0
> +; CHECK: BB#1: derived from LLVM BB %for.cond2
> +; CHECK: Successors according to CFG: BB#3(28004359) BB#4(1101746182)
> +; CHECK: BB#4: derived from LLVM BB %for.cond2
> +; CHECK: Successors according to CFG: BB#3(56008718) BB#2(2147483647)
> +
> +for.inc:                                          ; preds = %for.cond2
> +  %shl = shl i32 %bit.0, 1
> +  %inc19 = add nsw i32 %i.1, 1
> +  br label %for.cond2
> +
> +for.inc20:                                        ; preds = %for.cond2
> +  ret void
> +}
> +
> +!0 = metadata !{metadata !"branch_weights", i32 112017436, i32 -735157296}
>
>
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