[llvm] r200131 - Only generate the popc instruction for SPARC CPUs that implement it.

Jakob Stoklund Olesen stoklund at 2pi.dk
Sat Jan 25 22:09:59 PST 2014


Author: stoklund
Date: Sun Jan 26 00:09:59 2014
New Revision: 200131

URL: http://llvm.org/viewvc/llvm-project?rev=200131&view=rev
Log:
Only generate the popc instruction for SPARC CPUs that implement it.

The popc instruction is defined in the SPARCv9 instruction set
architecture, but it was emulated on CPUs older than Niagara 2.

Modified:
    llvm/trunk/lib/Target/Sparc/Sparc.td
    llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
    llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
    llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
    llvm/trunk/test/CodeGen/SPARC/ctpop.ll

Modified: llvm/trunk/lib/Target/Sparc/Sparc.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/Sparc.td?rev=200131&r1=200130&r2=200131&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/Sparc.td (original)
+++ llvm/trunk/lib/Target/Sparc/Sparc.td Sun Jan 26 00:09:59 2014
@@ -34,6 +34,9 @@ def FeatureHardQuad
   : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true",
                      "Enable quad-word floating point instructions">;
 
+def UsePopc : SubtargetFeature<"popc", "UsePopc", "true",
+                               "Use the popc (population count) instruction">;
+
 //===----------------------------------------------------------------------===//
 // Register File, Calling Conv, Instruction Descriptions
 //===----------------------------------------------------------------------===//
@@ -69,9 +72,9 @@ def : Proc<"v9",              [FeatureV9
 def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated]>;
 def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated]>;
 def : Proc<"niagara",         [FeatureV9, FeatureV8Deprecated]>;
-def : Proc<"niagara2",        [FeatureV9, FeatureV8Deprecated]>;
-def : Proc<"niagara3",        [FeatureV9, FeatureV8Deprecated]>;
-def : Proc<"niagara4",        [FeatureV9, FeatureV8Deprecated]>;
+def : Proc<"niagara2",        [FeatureV9, FeatureV8Deprecated, UsePopc]>;
+def : Proc<"niagara3",        [FeatureV9, FeatureV8Deprecated, UsePopc]>;
+def : Proc<"niagara4",        [FeatureV9, FeatureV8Deprecated, UsePopc]>;
 
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=200131&r1=200130&r2=200131&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Sun Jan 26 00:09:59 2014
@@ -1463,7 +1463,8 @@ SparcTargetLowering::SparcTargetLowering
     setOperationAction(ISD::BR_CC, MVT::i64, Custom);
     setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
 
-    setOperationAction(ISD::CTPOP, MVT::i64, Legal);
+    if (Subtarget->usePopc())
+      setOperationAction(ISD::CTPOP, MVT::i64, Legal);
     setOperationAction(ISD::CTTZ , MVT::i64, Expand);
     setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
     setOperationAction(ISD::CTLZ , MVT::i64, Expand);
@@ -1569,7 +1570,7 @@ SparcTargetLowering::SparcTargetLowering
 
   setStackPointerRegisterToSaveRestore(SP::O6);
 
-  if (Subtarget->isV9())
+  if (Subtarget->isV9() && Subtarget->usePopc())
     setOperationAction(ISD::CTPOP, MVT::i32, Legal);
 
   if (Subtarget->isV9() && Subtarget->hasHardQuad()) {

Modified: llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp?rev=200131&r1=200130&r2=200131&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp Sun Jan 26 00:09:59 2014
@@ -31,7 +31,8 @@ SparcSubtarget::SparcSubtarget(const std
   V8DeprecatedInsts(false),
   IsVIS(false),
   Is64Bit(is64Bit),
-  HasHardQuad(false) {
+  HasHardQuad(false),
+  UsePopc(false) {
 
   // Determine default and user specified characteristics
   std::string CPUName = CPU;

Modified: llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcSubtarget.h?rev=200131&r1=200130&r2=200131&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcSubtarget.h (original)
+++ llvm/trunk/lib/Target/Sparc/SparcSubtarget.h Sun Jan 26 00:09:59 2014
@@ -30,6 +30,7 @@ class SparcSubtarget : public SparcGenSu
   bool IsVIS;
   bool Is64Bit;
   bool HasHardQuad;
+  bool UsePopc;
 
 public:
   SparcSubtarget(const std::string &TT, const std::string &CPU,
@@ -39,6 +40,7 @@ public:
   bool isVIS() const { return IsVIS; }
   bool useDeprecatedV8Instructions() const { return V8DeprecatedInsts; }
   bool hasHardQuad() const { return HasHardQuad; }
+  bool usePopc() const { return UsePopc; }
 
   /// ParseSubtargetFeatures - Parses features string setting specified
   /// subtarget options.  Definition of function is auto generated by tblgen.

Modified: llvm/trunk/test/CodeGen/SPARC/ctpop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/ctpop.ll?rev=200131&r1=200130&r2=200131&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/ctpop.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/ctpop.ll Sun Jan 26 00:09:59 2014
@@ -1,13 +1,13 @@
 ; RUN: llc < %s -march=sparc -mattr=-v9 | FileCheck %s -check-prefix=V8
-; RUN: llc < %s -march=sparc -mattr=+v9 | FileCheck %s -check-prefix=V9
-; RUN: llc < %s -march=sparc -mcpu=v9 | FileCheck %s -check-prefix=V9
-; RUN: llc < %s -march=sparc -mcpu=ultrasparc  | FileCheck %s -check-prefix=V9
-; RUN: llc < %s -march=sparc -mcpu=ultrasparc3 | FileCheck %s -check-prefix=V9
-; RUN: llc < %s -march=sparc -mcpu=niagara     | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -march=sparc -mattr=+v9,+popc | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -march=sparc -mcpu=v9 | FileCheck %s -check-prefix=V8
+; RUN: llc < %s -march=sparc -mcpu=ultrasparc  | FileCheck %s -check-prefix=V8
+; RUN: llc < %s -march=sparc -mcpu=ultrasparc3 | FileCheck %s -check-prefix=V8
+; RUN: llc < %s -march=sparc -mcpu=niagara     | FileCheck %s -check-prefix=V8
 ; RUN: llc < %s -march=sparc -mcpu=niagara2    | FileCheck %s -check-prefix=V9
 ; RUN: llc < %s -march=sparc -mcpu=niagara3    | FileCheck %s -check-prefix=V9
 ; RUN: llc < %s -march=sparc -mcpu=niagara4    | FileCheck %s -check-prefix=V9
-; RUN: llc < %s -march=sparcv9  | FileCheck %s -check-prefix=SPARC64
+; RUN: llc < %s -march=sparcv9 -mattr=+popc | FileCheck %s -check-prefix=SPARC64
 
 declare i32 @llvm.ctpop.i32(i32)
 





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