[Patch] [Thumbv8] Prevent bundling inst that sets CPSR

[Artyom Skrobov]

> Currently, for thumbv8, an extra pass "Thumb2SizeReduction" is run before
> IfConv.

> However, Thumb2SizeReduction may set CPSR for converted instrs (e.g. mul
->
> muls) and  such instrs may get bundled later on in IfConv pass, which
causes
> some illegal instructions. See http://llvm.org/bugs/show_bug.cgi?id=18370

> This patch adds checks for the eligibility of IT blocks: if an instruction
> already sets CPSR, then don't bundle it. Please help to review it.

Weiming, I think you may be approaching this problem from a wrong direction.

Running your test case with --show-mc-encoding, ARMv8 Thumb vs. ARMv7 Thumb,
confirms that the generated machine code is (identically) legal, correct,
and efficient:

$ llc < test.ll -mtriple thumbv7-none-linux-gnueabi --show-mc-encoding

foo:
@ BB#0:                                 @ %entry
	mov	r1, r0                  @ encoding: [0x01,0x46]
	movs	r0, #11                 @ encoding: [0x0b,0x20]
	cmp	r1, #0                  @ encoding: [0x00,0x29]
	it	ne                      @ encoding: [0x18,0xbf]
	mulne	r0, r1, r0              @ encoding: [0x48,0x43]
	bx	lr                      @ encoding: [0x70,0x47]

$ llc < test.ll --show-mc-encoding

foo:
@ BB#0:                                 @ %entry
	mov	r1, r0                  @ encoding: [0x01,0x46]
	movs	r0, #11                 @ encoding: [0x0b,0x20]
	cmp	r1, #0                  @ encoding: [0x00,0x29]
	it	ne                      @ encoding: [0x18,0xbf]
	mulsne	r0, r1, r0              @ encoding: [0x48,0x43]
	bx	lr                      @ encoding: [0x70,0x47]

This relates to the feature of the narrow Thumb instructions to execute as
CPSR-setting when outside of an IT block, but as non-CPSR-setting when
placed in an IT block.

You're right, though, that the MC instruction for the MUL has an incorrect
attribute, resulting in the incorrect assembly string getting printed.


On the other hand, applying your patch disables the if-conversion for this
case, producing the suboptimal branching code:

$ llc < test.ll --show-mc-encoding

foo:
@ BB#0:                                 @ %entry
	mov	r1, r0                  @ encoding: [0x01,0x46]
	movs	r0, #11                 @ encoding: [0x0b,0x20]
	cbz	r1, .LBB0_2             @ encoding: [0x01'A',0xb1'A']
                                        @   fixup A - offset: 0, value:
.LBB0_2, kind: fixup_arm_thumb_cb
@ BB#1:                                 @ %cond.true
	muls	r0, r1, r0              @ encoding: [0x48,0x43]
.LBB0_2:                                @ %cond.end
	bx	lr                      @ encoding: [0x70,0x47]