[llvm] r199812 - [x86] Silence unused diReg variable warning in non-asserting builds

[David Woodhouse]

Author: dwmw2
Date: Wed Jan 22 09:31:32 2014
New Revision: 199812

URL: http://llvm.org/viewvc/llvm-project?rev=199812&view=rev
Log:
[x86] Silence unused diReg variable warning in non-asserting builds

Modified:
    llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp?rev=199812&r1=199811&r2=199812&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Wed Jan 22 09:31:32 2014
@@ -1318,11 +1318,10 @@ EncodeInstruction(const MCInst &MI, raw_
   case X86II::Pseudo:
     llvm_unreachable("Pseudo instruction shouldn't be emitted");
   case X86II::RawFrmDstSrc: {
-    unsigned diReg = MI.getOperand(0).getReg();
     unsigned siReg = MI.getOperand(1).getReg();
-    assert(((siReg == X86::SI && diReg == X86::DI) ||
-           (siReg == X86::ESI && diReg == X86::EDI) ||
-            (siReg == X86::RSI && diReg == X86::RDI)) &&
+    assert(((siReg == X86::SI && MI.getOperand(0).getReg() == X86::DI) ||
+            (siReg == X86::ESI && MI.getOperand(0).getReg() == X86::EDI) ||
+            (siReg == X86::RSI && MI.getOperand(0).getReg() == X86::RDI)) &&
            "SI and DI register sizes do not match");
     // Emit segment override opcode prefix as needed (not for %ds).
     if (MI.getOperand(2).getReg() != X86::DS)